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* radeonsi: Pass the slice size to si_dma_copy_bufferMichel Dänzer2014-09-301-4/+4
| | | | | | Otherwise some parts of tiled slices can be missed. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Catch more cases that can't be handled by si_dma_copy_buffer/tileMichel Dänzer2014-09-301-3/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix si_dma_copy(_tile) for compressed formatsMichel Dänzer2014-09-301-2/+2
| | | | | | | Fixes GPUVM faults when running the piglit test "getteximage-formats init-by-rendering" with R600_DEBUG=forcedma on SI. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix tiling mode index for stencil resourcesMichel Dänzer2014-09-301-2/+3
| | | | | | | | | | | We are currently only dealing with depth-only or stencil-only resources here, not with resources having both depth and stencil[0]. In both cases, the tiling mode index is in the tile_mode field, not in the stencil_tile_mode field. [0] Add an assertion for that. Reviewed-by: Marek Olšák <[email protected]>
* ilo: fix format of edge flag pointerChia-I Wu2014-09-301-3/+5
| | | | | | | The VE format of edge flag pointers was changed in 780ce576bb1781f027797039693b98253ee4813e. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add a pass to finalize ilo_ve_stateChia-I Wu2014-09-308-158/+190
| | | | | | | | Add finalize_vertex_elements() to finalize ilo_ve_state. This fixes a potential issue with URB entry allocation for VS and move the complexity of gen6_3DSTATE_VERTEX_ELEMENTS() to the new function. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: precalculate aligned depth buffer sizeChia-I Wu2014-09-307-48/+43
| | | | | | To replace the hacky zs_align_surface(). Signed-off-by: Chia-I Wu <[email protected]>
* ilo: use dynamic bo for rectlist verticesChia-I Wu2014-09-3010-73/+92
| | | | | | The size is always 24 bytes. We can upload them to the dynamic buffer. Signed-off-by: Chia-I Wu <[email protected]>
* st/xa: Fix regression in xa_yuv_planar_blit()Thomas Hellstrom2014-09-302-0/+12
| | | | | | | | | | Commit "st/xa: scissor to help tilers" broke xa_yuv_planar_blit() and vmwgfx textured video. Fix this by implementing scissors also in the yuv draw path. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]> Cc: Rob Clark <[email protected]> Cc: "10.2 10.3" <[email protected]>
* i965: Delete intel_chipset.h.Kenneth Graunke2014-09-295-251/+0
| | | | | | Unused; it was replaced by include/pci_ids/i965_pci_ids.h long ago. Acked-by: Matt Turner <[email protected]>
* driconf: Correct and update Catalan translationAlex Henrie2014-09-291-8/+8
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* driconf: Update Spanish translationAlex Henrie2014-09-291-5/+5
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* driconf: Synchronize po filesAlex Henrie2014-09-296-319/+390
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* vc4: Don't try to do stores to buffers that aren't bound.Eric Anholt2014-09-291-5/+8
| | | | | | | | | | | | | | The code was kind of mixed up what buffers were getting stored in the case that a resolve bit was unset (which are set based on the GL state at draw time) and the buffer wasn't actually bound. In particular, depth-only rendering would store the color buffer contents, which happen to be pointing at the depth buffer. Thanks to clearing out the resolve bits for things we really can't resolve, now I can drop the safety checks for buffer presence around the actual stores. Fixes 42 piglit tests.
* vc4: Shove some depth comparison bits down to where they're used.Eric Anholt2014-09-291-5/+5
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* i965: Use BRW_MATH_DATA_SCALAR when source regioning is scalar.Matt Turner2014-09-296-11/+9
| | | | | | Notice the mistaken (but harmless) argument swapping in brw_math_invert(). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/compaction: Move variable declarations to their uses.Matt Turner2014-09-291-5/+4
| | | | Tested-by: Mark Janes <[email protected]>
* i965/compaction: Simplify jump target code.Matt Turner2014-09-291-26/+18
| | | | | | | | | | | | | | My attempts to clarify the code with _compacted/_uncompacted prefixed variables apparently failed. Hopefully this is clearer. In any case, the previous code wasn't clear enough to gcc to let it optimize division by a power of two into a shift. No problems now. Also, the previous code (in the ADD case) didn't work on 32-bit x86, due to complicated set of interactions best summed up as unsigned division and compiler optimizations. Tested-by: Mark Janes <[email protected]>
* freedreno/a3xx: re-emit shaders on variant changeRob Clark2014-09-292-1/+50
| | | | | | | | | We need to keep track if a state change other than frag/vert shader state will trigger us to need a different shader variant, and if necessary mark the appropriate shader state as dirty. Otherwise we will forget to re-emit the shader state. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add some cmdline argsRob Clark2014-09-291-8/+87
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add support to emulate GL_CLAMPRob Clark2014-09-298-16/+129
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: add texcoord clamp support to loweringRob Clark2014-09-292-5/+173
| | | | | | | This is for hw that needs to emulate some texture wrap modes (like CLAMP) with some help from the shader. Signed-off-by: Rob Clark <[email protected]>
* freedreno: move bind_sampler_states to per-generationRob Clark2014-09-294-23/+48
| | | | | | | | | Keep the existing function as a common helper. But this lets us move an a2xx specific hack out of common code. And the PIPE_TEX_WRAP_CLAMP emulation will require an a3xx specific hack. So rather than piling on hacks, split this out. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix border color orderRob Clark2014-09-291-5/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add 32bit integer vtx formatsRob Clark2014-09-292-17/+37
| | | | Signed-off-by: Rob Clark <[email protected]>
* vc4: Add support for GL 1.1's stupid CLAMP mode.Eric Anholt2014-09-291-4/+19
| | | | | | We just clamp the incoming texture coordinates. This breaks the lambda calculation, but it gets the piglit tests to pass. This is the same behavior as in i965.
* vc4: Add support for texture border color.Eric Anholt2014-09-292-1/+84
| | | | | | | One spot in the docs says that it's stored at a miplevel just beyond the last miplevel, which was scary. But really, you just load it as the R coordinate (which conflicts with cubemaps, but you don't do border clamping on cubes).
* vc4: Add the necessary stubs for occlusion queries.Eric Anholt2014-09-294-1/+87
| | | | | | We have to expose them for GL 2.0, but we just always return a value of 0. We should be advertising 0 query bits instead of 64, but gallium doesn't have plumbing for that yet. At least this stops the segfaults.
* vc4: Optimize out silly SUBs of 0.Eric Anholt2014-09-291-0/+11
| | | | | Drops instructions on vs-temp-array-mat4-index-col-row-wr.shader_test, which I was looking at because it's failing to register allocate.
* vc4: Dump constant uniform values in VC4_DEBUG=qir.Eric Anholt2014-09-296-24/+32
| | | | Definitely helps when trying to understand and optimize a program.
* vc4: Turn a SEL_X_Y(x, 0) into SEL_X_0(x).Eric Anholt2014-09-291-14/+61
| | | | | | This may reduce register pressure and uniform counts. Drops a bunch of 0 uniform loads on vs-temp-array-mat4-index-col-row-wr.shader_test, which is failing to register allocate.
* vc4: Add support for texture cube maps.Eric Anholt2014-09-295-22/+84
| | | | | | It's not passing some of the piglit tests, because it looks like at small miplevels some contents from surrounding faces are getting filtered in at the corners. It does get 7 new tests passing.
* vc4: Rename the slice's size0.Eric Anholt2014-09-292-5/+5
| | | | | | In the other related fields, "0" refers to the size of the first miplevel, while this is a field in a slice. The other implicit slices we have (cubemap layers) don't vary in size compared to the first one.
* vc4: Stop trying to reuse temporaries that store uniform values.Eric Anholt2014-09-292-12/+0
| | | | | | | | | | | Almost always, the MOV will get copy propagated out. Even if it doesn't, it's probably better to just reload the uniform at next use (to reduce register pressure) rather than try to save instruction count. I was looking at this because in the presence of texturing (which calls add_uniform() directly to get the uniform load forced into the instruction) the c->uniform_contents indices don't match 1:1 with the temporary qregs.
* egl: setup screen iterator before using itTapani Pälli2014-09-291-1/+1
| | | | | | | | commit 4ed23fd broke creation of pbuffer surfaces, patch fixes the failure, noticed when running chrome with '--use-gl=egl'. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* ilo: fix a missing 'else'Chia-I Wu2014-09-291-1/+1
| | | | | | An 'else' is missing in the disassembler. Signed-off-by: Chia-I Wu <[email protected]>
* glsl: Allow texture2DProjLod and textureCubeLod in GL ESKalyan Kondapally2014-09-291-3/+3
| | | | | | | | | | According to GLES (i.e. 1.0 and above) spec textureCubeLod and texture2DProjLod are built in functions. We seem to disable support for these functions with GLES. This patch enables the support. Signed-off-by: Kalyan Kondapally <[email protected]> Reviewed-by: Matt Turner <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84355
* configure.ac: bump libdrm_freedreno requirementRob Clark2014-09-281-1/+1
| | | | | | We need 2.4.57 for fd_bo_dmabuf() / fd_bo_from_dmabuf(). Signed-off-by: Rob Clark <[email protected]>
* glsl: Recognize open-coded pow(x, y).Matt Turner2014-09-271-0/+14
| | | | | | | | pow(x, y) is equivalent to exp(log(x) * y). instructions in affected programs: 578 -> 458 (-20.76%) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Don't invalidate live intervals in saturate propagation.Matt Turner2014-09-271-2/+1
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Ignore mov.sat instructions in interference check in sat prop.Matt Turner2014-09-271-1/+2
| | | | | | | | | | | | When an instruction's result was consumed by multiple mov.sat instructions, we would decide that we couldn't move the saturate modifier because something else was using the result, even though it was just another mov.sat! total instructions in shared programs: 4275598 -> 4274842 (-0.02%) instructions in affected programs: 75634 -> 74878 (-1.00%) Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Walk instructions in reverse in saturate propagation.Matt Turner2014-09-271-3/+3
| | | | | | | | | | When we find a mov.sat, we search backwards. We might as well search everything else backwards as well and potentially look at fewer instructions. This change enables the next patch. Reviewed-by: Jason Ekstrand <[email protected]>
* freedreno/a3xx: add flat interpolation modeRob Clark2014-09-277-19/+60
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add LOD_BIASRob Clark2014-09-271-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: turn missing caps into compile warningsRob Clark2014-09-271-10/+10
| | | | | | | | Get rid of the 'default' case (as suggestied by imirkin) so compiler warns us about missing caps. Also add some caps that were missing until now. Signed-off-by: Rob Clark <[email protected]>
* freedreno: we have more than 0 viewports!Rob Clark2014-09-271-0/+3
| | | | | | | | | 4155d1c7 'st/mesa: drop dependence on API profile in st_init_extensions' broke freedreno because somehow 'PIPE_CAP_MAX_VIEWPORTS' fell through the cracks. Resulting that we reported zero viewports. So the state tracker never bothered to give us any valid viewport! Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-09-274-17/+133
| | | | | | Among other things, fixes a bug for fixed point registers/bitfields. Signed-off-by: Rob Clark <[email protected]>
* freedreno: don't advertise mirror-clamp supportRob Clark2014-09-271-1/+1
| | | | | | At least on a3xx, we cannot do it without some emulation in shader. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix compiler warningRob Clark2014-09-271-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* configure.ac: Compute LLVM_VERSION_PATCH using llvm-configTom Stellard2014-09-271-5/+4
| | | | | | | | | This is the only guaranteed way get the patch level for llvm, since the define cannot always be found in config.h depending on the version of llvm or the build system used. CC: 10.2 10.3 <[email protected]> Reviewed-by: Jonathan Gray <[email protected]>
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