| Commit message (Collapse) | Author | Age | Files | Lines |
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This way we get correct sampling from RGB formats that are faked as RGBA.
This should also cause it to disable rendering and blending on those
formats. We should be able to render to them and, on Broadwell and above,
we can blend on them with work-arounds. However, we'll add support for
that more properly later when it's deemed useful. For now, disabling
rendering and blending should be safe.
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The new code removes the switch statement and instead handles depth/stencil
as up-front special cases. This allows for potentially more complicated
color format handling in the future.
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This way the entire anv_format structure fits in 32 bits
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This commit removes anv_format_for_vk_format and adds an anv_get_format
helper. The anv_get_format helper returns the anv_format by-value. Unlike
anv_format_for_vk_format the format returned by anv_get_format is 100%
accurate and includes any tweaks needed for tiled vs. linear.
anv_get_isl_format is now just a wrapper around anv_get_format that picks
off just the isl_format.
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Now that we have VkFormat introspection and we've removed everything that
tried to use anv_format for introspection, we no longer need most of what
was in anv_format.
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All it ever did was some extra logging that was useful when initially
bringing up Dota2. We don't need it anymore.
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Because the buffer is exposed to the user, the block size is defined to
always exactly be the size of the actual vulkan format. This is the same
size (it had better be) as the linaer image format.
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As much as I hate adding yet more format introspection, there are times
when the VkFormat is sufficient and we don't want to round-trip through
isl_format. For these times, the new vk_format_info.c/h files provide some
simple driver-agnostic VkFormat introspection. This intended to be
specific to Vulkan but not to any driver whatsoever.
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This makes several checks easier and allows us to avoid calling
anv_format_for_vk_format in a number of cases.
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This better maps to the Vulkan object model and also allows WSI to at least
know the hardware generation which is useful for format checks.
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Otherwise the instances in the extension XML override the core
definitions, and we stop knowing their sizes in indirect_size_get.c
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Adam Jackson <[email protected]>
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Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Adam Jackson <[email protected]>
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Squashes the one remaining warning in the xserver build.
v2: Also clean up some non-standard whitespace (Ian Romanick)
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Adam Jackson <[email protected]>
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v2: Use == not is for equality testing (Dylan Baker)
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Adam Jackson <[email protected]>
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We're about to update the generator scripts to use these, easier not to
vary between client and server.
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Adam Jackson <[email protected]>
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Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Adam Jackson <[email protected]>
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Signed-off-by: Rob Clark <[email protected]>
Acked-by: Eric Anholt <[email protected]>
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Prep work for next patch.
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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... otherwise we'll produce uncomplete binaries with introduction of NIR
as alternative IR with next commits.
Signed-off-by: Emil Velikov <[email protected]>
Acked-by: Jose Fonseca <[email protected]>
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This allows us to disable spilling for blorp shaders since blorp state
setup doesn't handle spilling. Without this, blorp fails hard if you run
with INTEL_DEBUG=spill.
Reviewed-by: Francisco Jerez <[email protected]>
Tested-by: Francisco Jerez <[email protected]>
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We were always doing atomics on shared memory location 0 instead of the
originally supplied location. Make sure to pass through the original
symbol and any indirection.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Cc: [email protected] # note: expect minor conflict
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Signed-off-by: Rob Clark <[email protected]>
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Log all the errors, and at the end dump the shader w/ error annotations
to make it easier to see where the problems are.
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eduardo Lima Mitev <[email protected]>
Reviewed-by: Connor Abbott <[email protected]>
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Prep work for next patch.
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Connor Abbott <[email protected]>
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Caller can pass a hashtable mapping NIR object (currently instr or var,
but I guess others could be added as needed) to annotation msg to print
inline with the shader dump. As the annotation msg is printed, it is
removed from the hashtable to give the caller a way to know about any
unassociated msgs.
This is used in the next patch, for nir_validate to try to associate
error msgs to nir_print dump.
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eduardo Lima Mitev <[email protected]>
Reviewed-by: Connor Abbott <[email protected]>
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ARB_vertex_attrib_64bit was the only feature missing.
v2: we can expose 4.2 instead of 4.1 (Ian Romanick)
Reviewed-by: Kenneth Graunke <[email protected]>
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v2: label as done for i965/gen8+ instead of i965 (Kenneth Graunke)
Reviewed-by: Kenneth Graunke <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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Input attributes can require 2 vec4 or 1 vec4 depending on whether they
are double-precision or not.
Reviewed-by: Kenneth Graunke <[email protected]>
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When computing where the first non-payload GRF starts, we can't rely on
the number of attributes, as each attribute can be using 1 or 2 slots
depending on whether they are a dvec3/4 or other.
Instead, we need to use the number of slots used by the attributes.
Reviewed-by: Kenneth Graunke <[email protected]>
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Do not use total attributes because a dvec3/dvec4 attribute requires two
slots. So rather use total attribute slots.
v2: do not use loop to calculate required attribute slots (Kenneth
Graunke)
Reviewed-by: Kenneth Graunke <[email protected]>
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Double-precision types require 1 slot in VUE for double and dvec2, and 2 slots for
anything else.
Reviewed-by: Kenneth Graunke <[email protected]>
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This bitmap tracks which input attributes are double-precision.
Reviewed-by: Kenneth Graunke <[email protected]>
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VS Thread Payload handles attributes in URB as vec4, no matter if they
are actually single or double precision.
So with double-precision types, value ends up in the registers split in
32bits chunks, in different positions.
We need to shuffle the chunks to get the doubles correctly.
v2:
* Extra blank line. Add { } on if body (Ian Romanick)
* Use dest directly (Kenneth Graunke)
Reviewed-by: Kenneth Graunke <[email protected]>
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The HW has a restriction that only vertical stride may cross register
boundaries. Until now this was only handled on VGRFs at
rw_reg_from_fs_reg, but it is also needed for attributes.
v2:
* Remove reference to commit id on commit message (Juan Suarez)
* Simplify code that compute final exec_size (Ian Romanick)
* Use REG_SIZE on that same code (Kenneth Graunke)
Reviewed-by: Kenneth Graunke <[email protected]>
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Add an assertion to detect this case.
Reviewed-by: Kenneth Graunke <[email protected]>
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From the Broadwell specification, structure VERTEX_ELEMENT_STATE
description:
"When SourceElementFormat is set to one of the *64*_PASSTHRU
formats, 64-bit components are stored in the URB without any
conversion. In this case, vertex elements must be written as 128
or 256 bits, with VFCOMP_STORE_0 being used to pad the output
as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into
the URB, Component 1 must be specified as VFCOMP_STORE_0 (with
Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit
vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0
in order to output a 256-bit vertex element. Likewise, use of
R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0
in order to output a 256-bit vertex element."
Uses 128-bits to write double and dvec2 vertex elements, and 256-bits for
dvec3 and dvec4 vertex elements.
Signed-off-by: Juan A. Suarez Romero <[email protected]>
Signed-off-by: Antia Puentes <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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