summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* gallium: whitespace, comment formatting fixes in p_defines.hBrian Paul2015-02-261-30/+36
| | | | | | Just to keep things consistent. Reviewed-by: José Fonseca <[email protected]>
* util: add debug_print_bind_flags() debug helperBrian Paul2015-02-262-0/+36
| | | | Reviewed-by: José Fonseca <[email protected]>
* gallium: renumber PIPE_BIND_ flagsBrian Paul2015-02-261-13/+13
| | | | | | | Note that PIPE_BIND_COMMAND_ARGS_BUFFER and PIPE_BIND_LINEAR were both bit 21 before. Reviewed-by: José Fonseca <[email protected]>
* meta: In pbo_{Get,}TexSubImage don't repeatedly rebind the source texNeil Roberts2015-02-261-4/+0
| | | | | | | | A layered PBO image is now interpreted as a single tall 2D image so the z argument in _mesa_meta_bind_fbo_image is ignored. Therefore this was just redundantly rebinding the same image repeatedly. Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: use fi_type in vertex attribute codeMarius Predut2015-02-2511-97/+117
| | | | | | | | | | | | | | | | | | | | | | | For 32-bit builds, floating point operations use x86 FPU registers, not SSE registers. If we're actually storing an integer in a float variable, the value might get modified when written to memory. This patch changes the VBO code to use the fi_type (float/int union) to store/copy vertex attributes. Also, this can improve performance on x86 because moving floats with integer registers instead of FP registers is faster. Neil Roberts review: - include changes on all places that are storing attribute values. - check with and without -O3 compiler flag. Brian Paul review: - use fi_type type instead gl_constant_value type - fix a bunch of nit-picks. - fix compiler warnings Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82668 Signed-off-by: Marius Predut <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/gen8: Use HALIGN_16 if MCS is enabled for non-MSRTAnuj Phogat2015-02-251-0/+3
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965: Pass pointer to miptree as function parameter in ↵Anuj Phogat2015-02-251-6/+6
| | | | | | | | | intel_horizontal_texture_alignment_unit This will be used by next patch in the series. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965: Allocate texture buffer in intelTexImageAnuj Phogat2015-02-251-2/+11
| | | | | | | | | before calling _mesa_meta_pbo_TexSubImage(). This will be used in later patches and will be required in Skylake to get the tile resource mode of miptree before calling _mesa_meta_pbo_TexSubImage(). Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965: Make a function to check the conditions to use the blitterAnuj Phogat2015-02-251-11/+29
| | | | | | | No functional changes in the patch. Just makes the code look cleaner. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965: Move the comment to the right placeAnuj Phogat2015-02-251-1/+1
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965: Fix condition to use Y tiling in blitter in intel_miptree_create()Anuj Phogat2015-02-251-3/+3
| | | | | | | Y tiling is supported in blitter on SNB+. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* meta: Pass null pointer for the pixel data to avoid unnecessary data uploadAnuj Phogat2015-02-251-1/+4
| | | | | | | to a temporary pbo created in _mesa_meta_pbo_GetTexSubImage(). Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* meta: Fix buffer object assignment to account for both pack and unpack bo'sAnuj Phogat2015-02-251-1/+1
| | | | | | | | | create_texture_for_pbo() is shared by _mesa_meta_pbo_GetTexSubImage() and _mesa_meta_pbo_TexSubImage() functions. So, we need to account for both pack and unpack buffer objects. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* meta: Use GL_STREAM_READ for pbo created with GL_PIXEL_PACK_BUFFERAnuj Phogat2015-02-251-1/+7
| | | | | | | | | | create_texture_for_pbo() is used by both _mesa_meta_pbo_GetTexSubImage() and _mesa_meta_pbo_TexSubImage() functions with different PBO targets. Use GL_STREAM_READ with GL_PIXEL_PACK_BUFFER and GL_STREAM_DRAW with GL_PIXEL_UNPACK_BUFFER. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* meta: Add assertion check for ctx->Meta->SaveStackDepthAnuj Phogat2015-02-251-0/+2
| | | | | | | before using it for derefrencing. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* meta: Do power of two samples check only for samples > 0Anuj Phogat2015-02-251-2/+2
| | | | | | | otherwise samples=0 passes the check, which is invalid. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* glsl: Rewrite and fix min/max to saturate optimization.Matt Turner2015-02-251-29/+46
| | | | | | | | | | | | | | | | | | | | | | There were some bugs, and the code was really difficult to follow. We would optimize min(max(x, b), 1.0) into max(sat(x), b) but not pay attention to the order of min/max and also do max(min(x, b), 1.0) into max(sat(x), b) Corrects four shaders from Champions of Regnum that do min(max(x, 1), 10) and corrects rendering of Mass Effect under VMware Workstation. Cc: "10.4 10.5" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89180 Reviewed-by: Abdiel Janulgue <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno: drop ARRAY_SIZE macroRob Clark2015-02-251-2/+0
| | | | | | | | | | | | | | | | | Since now ARRAY_SIZE has been added to util/macros.h. Fixes a bunch of: freedreno_util.h:79:0: warning: "ARRAY_SIZE" redefined #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) ^ In file included from ../../../../src/gallium/include/pipe/p_compiler.h:36:0, from ../../../../src/gallium/include/pipe/p_context.h:31, from freedreno_context.h:32, from freedreno_context.c:29: ../../../../src/util/macros.h:29:0: note: this is the location of the previous definition # define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x))) ^ Signed-off-by: Rob Clark <[email protected]>
* i965: Don't force x-tiling for 16-bpp formats on Gen>7Neil Roberts2015-02-251-3/+3
| | | | | | | | | | | | Sandybridge doesn't support y-tiling for surface formats with 16 or more bpp. There was previously an override to explicitly allow this for Gen7. However, this restriction is also removed in Gen8+ so we should use y-tiling there too. This is important to do for Skylake which doesn't support x-tiling for 3D surfaces. Reviewed-by: Ben Widawsky <[email protected]>
* glx: Fix returned values of GLX_RENDERER_PREFERRED_PROFILE_MESAAndreas Boll2015-02-251-6/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | If the renderer supports the core profile the query returned incorrectly 0x8 as value, because it was using (1U << __DRI_API_OPENGL_CORE) for the returned value. The same happened with the compatibility profile. It returned 0x1 (1U << __DRI_API_OPENGL) instead of 0x2. Internal DRI defines: dri_interface.h: #define __DRI_API_OPENGL 0 dri_interface.h: #define __DRI_API_OPENGL_CORE 3 Those two bits are supposed for internal usage only and should be translated to GLX_CONTEXT_CORE_PROFILE_BIT_ARB (0x1) for a preferred core context profile and GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB (0x2) for a preferred compatibility context profile. This patch implements the above translation in the glx module. v2: Fix the incorrect behavior in the glx module Cc: "10.3 10.4 10.5" <[email protected]> Signed-off-by: Andreas Boll <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* dri/common: Update comment about driQueryRendererIntegerCommonAndreas Boll2015-02-251-0/+1
| | | | | | | | | Since 87d3ae0b45b6b6bb50b583dafa55eb109449a005 driQueryRendererIntegerCommon handles __DRI2_RENDERER_PREFFERED_PROFILE too. Signed-off-by: Andreas Boll <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: add double support for packing varyingsIlia Mirkin2015-02-241-27/+90
| | | | | | | | | Doubles are always packed, but a single double will never cross a slot boundary -- single slots can still be wasted in some situations. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* common: Fix PBOs for 1D_ARRAY.Laura Ekstrand2015-02-241-26/+36
| | | | | | | | | | | Corrects the way that _mesa_meta_pbo_TexSubImage and _mesa_meta_pbo_GetTexSubImage handle 1D_ARRAY textures. Fixes a failure in the Piglit arb_direct_state_access/gettextureimage-targets test. Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Laura Ekstrand <[email protected]> Cc: "10.4, 10.5" <[email protected]>
* common: Correct PBO 2D_ARRAY handling.Laura Ekstrand2015-02-241-9/+17
| | | | | | | | | | | | | | | | | | | Changes PBO uploads and downloads to use a tall (height * depth) 2D texture for blitting. This fixes the bug where 2D_ARRAY, 3D, and CUBE_MAP_ARRAY textures are not properly uploaded and downloaded. Removes the option to use a 2D ARRAY texture for the PBO during upload and download. This option didn't work because the miptree couldn't be set up reliably. v2: Review from Jason Ekstrand and Neil Roberts: -Delete the depth parameter from create_texture_for_pbo -Abandon the option to create a 2D ARRAY texture in create_texture_for_pbo Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "10.4, 10.5" <[email protected]>
* common: Correct texture init for meta pbo uploads and downloads.Laura Ekstrand2015-02-241-1/+4
| | | | | | | | | | | | | | | | | This moves the line setting immutability for the texture to after _mesa_initialize_texture_object so that the initializer function will not cancel it out. Moreover, because of the ARB_texture_view extension, immutable textures must have NumLayers > 0, or depth will equal (0-1)=0xFFFFFFFF during SURFACE_STATE setup, which triggers assertions. v2: Review from Kenneth Graunke: - Include more explanation in the commit message. - Make texture setup bug fixes into a separate patch. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "10.4, 10.5" <[email protected]>
* mesa: remove DEG2RAD macroBrian Paul2015-02-243-11/+3
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: remove MAX_GLUSHORT, move MAX_GLUINTBrian Paul2015-02-242-3/+5
| | | | | | The later is only used in one place in swrast. Reviewed-by: Matt Turner <[email protected]>
* mesa: move signbit() macro to c99_math.hBrian Paul2015-02-242-8/+8
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: remove unused isblank() functionBrian Paul2015-02-241-1/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* glcpp: remove unneeded #include of core.hBrian Paul2015-02-241-1/+0
| | | | | | isblank() is not used in the code. Reviewed-by: Matt Turner <[email protected]>
* mesa: remove sqrtf macroBrian Paul2015-02-241-11/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Remove redundant discard jumps.Kenneth Graunke2015-02-242-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | With the previous optimization in place, some shaders wind up with multiple discard jumps in a row, or jumps directly to the next instruction. We can remove those. Without NIR on Haswell: total instructions in shared programs: 5777258 -> 5775872 (-0.02%) instructions in affected programs: 20312 -> 18926 (-6.82%) helped: 716 With NIR on Haswell: total instructions in shared programs: 5773163 -> 5771785 (-0.02%) instructions in affected programs: 21040 -> 19662 (-6.55%) helped: 717 v2: Use the CFG rather than the old instructions list. Presumably the placeholder halt will be in the last basic block. v3: Make sure placeholder_halt->prev isn't the head sentinel (caught twice by Eric Anholt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Optimize "if (cond) discard;" to a conditional discard.Kenneth Graunke2015-02-244-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | st_glsl_to_tgsi and ir_to_mesa have handled conditional discards for a long time; the previous patch added that capability to i965. i965 (Haswell) shader-db stats: Without NIR: total instructions in shared programs: 5792133 -> 5776360 (-0.27%) instructions in affected programs: 737585 -> 721812 (-2.14%) helped: 6300 HURT: 68 GAINED: 2 With NIR: total instructions in shared programs: 5787538 -> 5769569 (-0.31%) instructions in affected programs: 767843 -> 749874 (-2.34%) helped: 6522 HURT: 35 GAINED: 6 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Handle conditional discards.Kenneth Graunke2015-02-242-17/+26
| | | | | | | | | | | | | The discard condition tells us which channels we want killed. We want to invert that condition to get the channels that should survive (remain live) in f0.1. Emit a CMP to negate it. Nothing generates these today, but that will change shortly. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: Introduce nir_intrinsic_discard_if.Kenneth Graunke2015-02-242-2/+10
| | | | | | | | | | | | This is a conditional discard, which takes a boolean source. Note that we don't generate ir_discard::condition today, so this shouldn't break drivers (since none implement this intrinsic yet). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Delete dead discard conditions in constant folding.Kenneth Graunke2015-02-241-0/+24
| | | | | | | | | | | | | | | | opt_constant_folding() already detects conditional assignments where the condition is constant, and either deletes the assignment or the condition. Make it handle discards in the same fashion. Spotted happening in the wild in Tropico 5 shaders. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Handle conditional discards in lower_discard_flow().Kenneth Graunke2015-02-241-1/+8
| | | | | | | | | | | | | This pass wasn't prepared to handle conditional discards. Instead of initializing the "discarded" temporary to "true", set it to the condition. Then, refer to the variable for the condition, to avoid duplicating the expression tree. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Make ir_rvalue_visitor visit ir_discard::condition.Kenneth Graunke2015-02-242-0/+22
| | | | | | | | | | | | | This was forgotten. I omitted the NULL check since we don't check ir_assignment::condition either. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Make ir_validate check the type of ir_discard::condition.Kenneth Graunke2015-02-241-0/+15
| | | | | | | | | | Copy and pasted from the ir_if::condition handling, plus a NULL check. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* Revert "i965/fs: Remove force_writemask_all assertion for execsize < 8."Matt Turner2015-02-241-0/+1
| | | | | | | | | This reverts commit 0d8f27eab7b7e8b7a16e76aabd3f6a0ab4880497. "This doesn't seem to be necessary." <- I was wrong! Tested-by: Markus Wick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/fs: Emit MOV(1) instructions with force_writemask_all.Matt Turner2015-02-241-0/+1
| | | | | | | Fixes rendering with Dolphin. Tested-by: Markus Wick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/fs: Optimize (gl_FrontFacing ? x : y) where x and y are ±1.0.Matt Turner2015-02-242-0/+95
| | | | | | | total instructions in shared programs: 5695356 -> 5689775 (-0.10%) instructions in affected programs: 486231 -> 480650 (-1.15%) helped: 2604 LOST: 1
* i965/fs/nir: Optimize integer multiply by a 16-bit constant.Matt Turner2015-02-241-1/+23
| | | | | | | | | | | | Gen8+ support was just broken, since MUL now consumes 32-bits from both sources. Fixes 986 piglit tests on my BDW. total instructions in shared programs: 7753873 -> 7753522 (-0.00%) instructions in affected programs: 28164 -> 27813 (-1.25%) helped: 77 GAINED: 47 Reviewed-by: Ian Romanick <[email protected]>
* i965/fs/nir: Optimize (gl_FrontFacing ? x : y) where x and y are ±1.0.Matt Turner2015-02-242-0/+90
| | | | | | | | total instructions in shared programs: 7756214 -> 7753873 (-0.03%) instructions in affected programs: 455452 -> 453111 (-0.51%) helped: 2333 Reviewed-by: Eric Anholt <[email protected]>
* nir/register: Add a parent_instr fieldJason Ekstrand2015-02-243-1/+18
| | | | | | | | | | | | | This adds a parent_instr field similar to the one for ssa_def. The difference here is that the parent_instr field on a nir_register can be NULL if the register does not have a unique definition or if that definition does not dominate all its uses. We set this field in the out-of-SSA pass so that backends can get SSA-like information even after they have gone out of SSA. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* st/mesa: remove unused/broken function st_print_shadersMarek Olšák2015-02-242-49/+0
| | | | Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: remove struct qualifier from st_src_reg parameterBrian Paul2015-02-241-1/+1
| | | | It's a class. Silences MSVC warning.
* mesa: remove INV_SQRTF() macroBrian Paul2015-02-2410-22/+15
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: remove ceilf, floorf macrosBrian Paul2015-02-241-2/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: remove expf macroBrian Paul2015-02-241-1/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-17 19:30:10 +0000