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* nvc0/ir: fix constraints for OP_SUSTx on KeplerSamuel Pitoiset2016-04-261-1/+3
| | | | | | | | Destination type is actually always 32-bits, so typeSizeof() returns 4 and no sources are condensed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: re-introduce TGSI lowering pass for imagesSamuel Pitoiset2016-04-261-3/+94
| | | | | | | | This is loosely based on the previous lowering pass wrote by calim four years ago. I did clean the code and fixed some issues. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: add support for TGSI image declarationsSamuel Pitoiset2016-04-261-1/+22
| | | | | | | | Old and dead resource code will be removed once images are completely done. Based on original patch by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add missing glMemoryBarrier bitsSamuel Pitoiset2016-04-261-1/+8
| | | | | | | | This fixes a bunch of subtests of arb_shader_image_load_store-host-mem-barrier. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> (v1)
* nvc0: enable RGB10_A2UI format on GK104Samuel Pitoiset2016-04-261-3/+3
| | | | | | | | | No clue why this was not enabled by default before, maybe because the SULDP conversion was wrong. Anyway, this helps in fixing all rgb10_a2ui piglit tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: shift address with blocksize for image buffersSamuel Pitoiset2016-04-261-0/+4
| | | | | | | This fixes a bunch of dEQP image buffers related tests. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: fix address offset when images have multiple levelsSamuel Pitoiset2016-04-261-0/+1
| | | | | | | This fixes arb_shader_image_load_store-level. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: bind images on 3D shaders for KeplerSamuel Pitoiset2016-04-262-2/+31
| | | | | | | Similar to surfaces validation for compute shaders. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: bind images on compute shaders for KeplerSamuel Pitoiset2016-04-264-28/+110
| | | | | | | | | | | Old surfaces validation code will be removed once images are completely done for Fermi/Kepler, that explains why I only disable it for now. This also introduces nvc0_get_surface_dims() which computes correct dimensions regarding the given target. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: reserve an area for surfaces info in the driver constbufSamuel Pitoiset2016-04-266-12/+12
| | | | | | | | | | | | | To process surfaces coordinates from the codegen part, and because some information like the format is not always available (eg. when writeonly is used), we have to stick some surfaces data in the driver constbuf. This is especially true for OpenCL because we don't know the format at shader compile time. This bumps the size of each shader area from 1K to 2K. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add preliminary support for imagesSamuel Pitoiset2016-04-265-2/+74
| | | | | | | | | | | | This implements set_shader_images() and resource invalidation for images. As OpenGL requires at least 8 images, we are going to expose this minimum value even if this might be raised for Kepler, but this limit is mainly for Fermi because the hardware only accepts 8 images. Based on original patch by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add emission for (a OP b) OP cSamuel Pitoiset2016-04-261-0/+26
| | | | | | | | This is pretty similar to NVC0 except that offsets have changed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0/ir: fix wrong emission of (a OP b) OP cSamuel Pitoiset2016-04-261-2/+2
| | | | | | | | | | | The third source must be emitted at offset 49 instead of 17 and the not modifier is at 52 instead of 20. If you look a bit above in emitLogicOp() you will see that the dest is emitted at 17 which confirms that src(2) is obviously wrong. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* scons: Support Clang on Windows.Jose Fonseca2016-04-261-9/+14
| | | | | | | | | | | | | | | | | - Introduce 'gcc_compat' env flag, for all compilers that define __GNUC__, (which includes Clang when it's not emulating MSVC.) - Clang doesn't support whole program optimization - Disable enumerator value warnings (not sure why Clang warns about them, as my understanding is that MSVC promotes enums to unsigned ints automatically.) This is not enough to build with Clang + AddressSanitizer though. More follow up changes will be required for that. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallium: Include intrin.h instead of defining ourselves.Jose Fonseca2016-04-263-6/+7
| | | | | | | | | More portable, particularly when building with Clang, which implements all MSVC intrisincs in its own intrin.h, but doesn't actually support `#pragma instrinsic`. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* scons: Whenever possible decide what to do based on platform and not compiler.Jose Fonseca2016-04-264-14/+9
| | | | | | | | | | Because compilers like GCC and Clang are effectively available everywhere so their presence/absence is seldom conclusive. Furthermore, all compilers we use now have stdint.h. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* scons: Move fallback HAVE_* definitions to headers.Jose Fonseca2016-04-263-43/+51
| | | | | | | | | | | | | | | | | | These were being defined in SCons, but it's not practical: - we actually need to include Gallium headers from external source trees, with completely disjoint build infrastructure, and it's unsustainable to replicate the HAVE_xxx checks or even hard-coded defines across everywhere. - checking compiler version via command line doesn't really work due to Clang essentially being like a cameleon which can fake either GCC or MSVC There's no change for autoconf. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* nir: Add missing break into switch in construct_value()Juha-Pekka Heikkila2016-04-261-0/+1
| | | | | | | | There seemed to be missing one break in nested switchcases. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Antia Puentes <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* radeonsi: Fix memory leak in error path.Bas Nieuwenhuizen2016-04-261-0/+2
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix build error because of missing paramOded Gabbay2016-04-261-1/+1
| | | | | Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]>
* r600g: use do_endian_swap in texture swapping functionOded Gabbay2016-04-261-1/+34
| | | | | | | | | For some texture formats we need to take "do_endian_swap" into account when configuring their swizzling. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: use do_endian_swap in color swapping functionsOded Gabbay2016-04-262-8/+14
| | | | | | | | | For some formats we need to take "do_endian_swap" into account when configuring swapping for color buffers. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: set endianess of 16/32-bit buffers according to do_endian_swapOded Gabbay2016-04-261-4/+13
| | | | | | | | | | | | | | | | | | This patch modifies r600_colorformat_endian_swap(), so for 16-bit and for 32-bit buffers, the endianess configuration will be determined not only by the color/texture format, but also by the do_endian_swap parameter. The only exception is for array formats, which are always set to not do swapping, because for them gallium sets an alias based on the machine's endianess. v4: V_0280A0_COLOR_16_16 and V_0280A0_COLOR_16_16_FLOAT should be set to 8IN16 because the bytes inside need to be swapped even for array formats. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: send endian info to format translation functionsOded Gabbay2016-04-267-32/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because r600 GPUs can't do swap in their DB unit, we need to disable endianess swapping for textures that are handled by DB. There are four format translation functions in r600g driver: - r600_translate_texformat - r600_colorformat_endian_swap - r600_translate_colorformat - r600_translate_colorswap This patch adds a new parameters to those functions, called "do_endian_swap". When running in a big-endian machine, the calling functions will check whether the texture/color is handled by DB - "rtex->is_depth && !rtex->is_flushing_texture" - and if so, they will send FALSE through this parameter. Otherwise, they will send TRUE. The translation functions, in specific cases, will look at this parameter and configure the swapping accordingly. v4: evergreen_init_color_surface_rat() is only used by compute and don't handle DB surfaces, so just sent hard-coded FALSE to translation functions when called by it. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* glsl: add ability to use essl 3.20Ilia Mirkin2016-04-254-0/+11
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* main: select ES3.2 version when all extensions are availableIlia Mirkin2016-04-251-1/+17
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* tgsi: pass a shader type to the machine create and clean up.Dave Airlie2016-04-265-15/+15
| | | | | | | | | | | | | There was definitely bugs here mixing up the PIPE_ and TGSI_ defines, hopefully they didn't cause any problems, since mostly it was special cases for GEOMETRY. This clarifies at shader machine create what type of shader this machine will execute. This is needed also for compute shaders where we don't want to allocate inputs/outputs. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium/tgsi: move tgsi_exec.h header out of draw_context.hDave Airlie2016-04-262-1/+1
| | | | | | | | | It gets annoying that changing the tgsi exec rebuilds the state tracker unnecessarily. Putting this include into draw_gs.h which uses it causes a lot less rebuilds. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallivm: make sampling more robust against bogus coordinatesRoland Scheidegger2016-04-263-13/+43
| | | | | | | | | | | | | | | | | | | | | | Some cases (especially these using fract for coord wrapping) did not handle NaNs (or Infs) correctly - the following code assumed the fract result could not be outside [0,1], but if the input is a NaN (or +-Inf) the fract result was NaN - which then could produce out-of-bound offsets. (Note that the explicit NaN behavior changes for min/max on x86 sse don't result in actual changes in the generated jit code, but may on other architectures. Found by looking through all the wrap functions.) This fixes https://bugs.freedesktop.org/show_bug.cgi?id=94955 No piglit changes. (v2: fix min/max typo in coord_mirror, add comment) Cc: "11.1 11.2" <[email protected]> Tested-by: Bruce Cherniak <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* radeonsi: fix missing include for Elements.Dave Airlie2016-04-261-0/+1
| | | | | | Since u_blitter.h no longer defines this. Signed-off-by: Dave Airlie <[email protected]>
* nvc0: bump the amount of shared memory per MP on MaxwellSamuel Pitoiset2016-04-261-1/+11
| | | | | | | | According to the CUDA compute capability version, GM10x can expose 64KB of shared memory while GM20x can use 96KB. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* r600: fix missing include for Elements macroDave Airlie2016-04-261-0/+1
| | | | | | | This got removed from u_blitter.h and we were taking it from there, this should just move to ARRAY_SIZE eventually. Signed-off-by: Dave Airlie <[email protected]>
* gm107/ir: s/invalid load/invalid store/Samuel Pitoiset2016-04-251-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: remove unused fxnRob Clark2016-04-251-6/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: convert over to rallocRob Clark2016-04-252-40/+6
| | | | | | | | | The home-grown heap scheme (which is ultra-simple but probably not good to always allocate and memset such a chunk of memory up front) was a remnant of fdre (where the ir originally came from). But since we have ralloc in mesa, lets just use that instead. Signed-off-by: Rob Clark <[email protected]>
* mesa/st: log some additional invalid-fbo casesRob Clark2016-04-251-0/+3
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* freedreno: honor handle->offsetRob Clark2016-04-251-2/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: disallow cat4 immed srcRob Clark2016-04-251-1/+1
| | | | | | | | Normally this would never happen (constant-propagation in NIR would eliminate the instruction), except it does happen for 'undef' which we turn into immed 0.0 for bookkeeping purposes. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add render-target formatsRob Clark2016-04-251-3/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-04-255-5/+8
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: reduce line width for deqp furtherRob Clark2016-04-251-1/+1
| | | | | | | | See a7eb12d0.. but that wasn't restrictive enough. Fixes dEQP-GLES3.functional.rasterization.primitives.line_strip_wide, and similar Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix sin/cosRob Clark2016-04-258-1/+92
| | | | | | | | | | We seem to need range reduction to get sane results. Fixes glmark2 jellyfish bench, and a whole bunch of dEQP-GLES3.functional.shaders.builtin_functions.precision.{sin,cos,tan}.* v2: squashed in android build fixes from Rob Herring Signed-off-by: Rob Clark <[email protected]>
* i965: Unroll SIMD16 DDY_FINE on Sandybridge.Kenneth Graunke2016-04-251-1/+5
| | | | | | | | | | | | This fixes 10 dEQP-GLES3 subtests: dEQP-GLES3.functional.shaders.derivate.dfdy.texture.float_nicest.*. Matt noticed that our Piglit tests for this use even numbered registers, while the failing dEQP tests use odd numbered registers. We believe that it works for even numbered registers, but not otherwise. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* docs: update the instructions for getting a git accountBrian Paul2016-04-251-8/+26
| | | | Reviewed-by: Matt Turner <[email protected]>
* docs: update link to Intel's graphics websiteBrian Paul2016-04-251-2/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa/gles: Allow format GL_RED to be used with MESA_FORMAT_R_UNORMJordan Justen2016-04-251-0/+2
| | | | | | | | | | | | | | | | If the bound framebuffer has a format of MESA_FORMAT_R_UNORM, then IMPLEMENTATION_COLOR_READ_FORMAT will return GL_RED. This change applies to OpenGLES contexts where additional restrictions are placed on the formats that are allowed to be supported. Fixes OpenGLES 3.1 CTS tests: * ES31-CTS.texture_border_clamp.sampling_texture.Texture2DDC16 * ES31-CTS.texture_border_clamp.sampling_texture.Texture2DDC16Linear * ES31-CTS.texture_border_clamp.sampling_texture.Texture2DDC32F * ES31-CTS.texture_border_clamp.sampling_texture.Texture2DDC32FLinear Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* svga: eliminiate unnecessary constant buffer updatesCharmaine Lee2016-04-253-2/+23
| | | | | | | | | | | | | | | | | | Currently if the texture binding is changed, emit_fs_consts() is triggered to update texture scaling factor for rectangle texture or texture buffer size in the constant buffer. But the update is only relevant if the texture binding includes a rectangle texture or a texture buffer. To eliminate the unnecessary constant buffer updates due to other texture binding changes, a new flag SVGA_NEW_TEXTURE_CONSTS will be used to trigger fragment shader constant buffer update when a rectangle texture or a texture buffer is bound. With this patch, the number of constant buffer updates in Lightsmark2008 reduces from hundreds per frame to about 28 per frame. Reviewed-by: Brian Paul <[email protected]>
* svga: mark the texture dirty for write transfer map onlyCharmaine Lee2016-04-251-2/+4
| | | | | | | | | Instead of unconditionally mark the texture subresource dirty at transfer map, we'll set the dirty bit for write transfer only. Tested with lightsmark2008 and glretrace. Reviewed-by: Brian Paul <[email protected]>
* svga: fix assert with PIPE_QUERY_OCCLUSION_PREDICATE for non-vgpu10Charmaine Lee2016-04-251-23/+20
| | | | | | | | | | With this patch, when running in hardware version 11, we'll use SVGA3D_QUERYTYPE_OCCLUSION query type for PIPE_QUERY_OCCLUSION_PREDICATE and return TRUE if samples-passed count is greater than 0. Fixes glretrace/solidworks2012_viewport running in hardware version 11. Reviewed-by: Brian Paul <[email protected]>
* svga: minimize surface flushCharmaine Lee2016-04-252-15/+85
| | | | | | | | | | | | Currently, we always do a surface flush when we try to establish a synchronized write transfer map. But if the subresource has not been modified, we can skip the surface flush. In other words, we only need to do a surface flush if the to-be-mapped subresource has been modified in this command buffer. With this patch, lightsmark2008 shows about 15% performance improvement. Reviewed-by: Brian Paul <[email protected]>
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