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* mesa: add casts to fix MSVC warnings in multisample.cBrian Paul2013-07-121-2/+3
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* mesa: s/GLint/GLuint/ to fix MSVC warnings in mipmap.cBrian Paul2013-07-121-2/+2
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* mesa: fix inconsistent function declaration, definitionsBrian Paul2013-07-122-4/+4
| | | | | To silence MSVC warnings that the declaration and definitions were different.
* mesa: add cast to silence MSVC warningBrian Paul2013-07-121-1/+1
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* radeon/uvd: fall back to shader based decoding for MPEG2 on UVD 2.x v2Christian König2013-07-122-5/+19
| | | | | | | | | | | UVD 2.x doesn't support hardware decoding of MPEG2, just use shader based decoding for those chipsets. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66450 v2: fix interlacing as well Signed-off-by: Christian König <[email protected]>
* glsl: Avoid variable length arrays.José Fonseca2013-07-121-7/+14
| | | | | | | | | They are a non-standard GCC extension that's not widely supported by other C/C++ compilers. Use a dynamic array instead. Trivial. Should fix the MSVC build.
* glsl: Add support for C-style initializers.Matt Turner2013-07-114-1/+257
| | | | | | | | | Required by GL_ARB_shading_language_420pack. Parts based on work done by Todd Previte and Ken Graunke, implementing basic support for C-style initializers of arrays. Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add infrastructure for aggregate initializers.Matt Turner2013-07-114-1/+72
| | | | Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add an is_declaration field to ast_struct_specifier.Matt Turner2013-07-112-1/+4
| | | | | | | | | | | | | | | | | | Will be used in a later commit to differentiate between a structure type declaration and a variable declaration of a struct type. I.e., the difference between struct S { float x; }; (is_declaration = true) and S s; (is_declaration = false) Also note that is_declaration = true for struct S { float x; } s; Reviewed-by: Ian Romanick <[email protected]>
* glsl: Track structs' ast_type_specifiers in symbol table.Matt Turner2013-07-112-4/+27
| | | | | | | | | Will be used in a future commit. An ast_type_specifier is stored (rather than an ast_struct_specifier) with the idea that we may have more general uses for this in the future. struct names are prefixed with '#ast.' to avoid collisions with the glsl_types in the symbol table. Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add process_vec_mat_constructor() function.Matt Turner2013-07-111-0/+114
| | | | | | Based largely on process_array_constructor(). Reviewed-by: Ian Romanick <[email protected]>
* glsl: Separate code into process_record_constructor().Matt Turner2013-07-111-48/+60
| | | | Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add copy-constructor for ast_struct_specifier.Matt Turner2013-07-111-0/+12
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add a constructor for ast_type_specifier.Matt Turner2013-07-111-0/+16
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Clean up and clarify comment explaining initializer rules.Matt Turner2013-07-111-7/+13
| | | | Reviewed-by: Ian Romanick <[email protected]>
* glsl: Change type of is_array to bool.Matt Turner2013-07-112-5/+5
| | | | Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add a comment to note what an exec_list is a list of.Matt Turner2013-07-111-0/+1
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Fix inverted conditional in error message.Matt Turner2013-07-111-1/+1
| | | | | | | | | | | | The code float a[2] = float[2]( 3.4, 4.2, 5.0 ); previously generated this: error: array constructor must have at least 2 parameters when in fact it requires exactly two. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add missing return error_value(ctx) in error path.Matt Turner2013-07-111-0/+1
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Remove unnecessary #include from ast_type.cpp.Matt Turner2013-07-111-3/+0
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl/build: build builtin_compiler with VISIBILITY_CFLAGSChia-I Wu2013-07-121-1/+2
| | | | | | | | | libglslcore.la and libglcpp.la that are built with builtin_compiler are also linked to by drivers not using libdricore. Since there is no public symbol in them, it is better to mark all symbols hidden. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Add comment explaining "row_major" parsing.Matt Turner2013-07-111-0/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Mark "row_major" as not a reserved word in GLSL ES 3.0.Matt Turner2013-07-111-2/+2
| | | | | | | | | | We mark ARB_uniform_buffer_object as enabled under ES 3 since it contains that functionality, which tricked the compiler into tokenizing "row_major". Acked-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Remove outdated FINISHME comment.Matt Turner2013-07-111-3/+0
| | | | | | Explicit index support was added by commit 1256a5dc. Reviewed-by: Ian Romanick <[email protected]>
* radeon: bump libdrm_radeon requirement for CIK supportAlex Deucher2013-07-111-1/+1
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: x/y coordinates must be divided by block dim in dma blitChristoph Bumiller2013-07-112-4/+16
| | | | | | | Note: this is a candidate for the 9.1 branch. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* r600g/sb: Fix Android build v2Chih-Wei Huang2013-07-124-7/+8
| | | | | | | Add the sb CXX files to the Android Makefile and also stop using some c++11 features. v2 (Vadim Girlin): use &bc[0] instead of bc.begin()
* r600g/sb: improve math optimizations v2Vadim Girlin2013-07-1111-47/+435
| | | | | | | | | | | | | | | | This patch adds support for some math optimizations that are generally considered unsafe, that's why they are currently disabled for compute shaders. GL requirements are less strict, so they are enabled for for GL shaders by default. In case of any issues with applications that rely on higher precision than guaranteed by GL, 'sbsafemath' option in R600_DEBUG allows to disable them. v2 - always set proper src vector size for transformed instructions - check for clamp modifier in the expr_handler::fold_assoc Signed-off-by: Vadim Girlin <[email protected]>
* st/xvmc/tests: avoid non portable error.h functionsJonathan Gray2013-07-111-5/+8
| | | | | Signed-off-by: Jonathan Gray <[email protected]> Reviewed-by: Christian König <[email protected]>
* i965/blorp: Fix clear rectangle alignment in fast color clearAnuj Phogat2013-07-101-4/+19
| | | | | | | | | | | | From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel Backend > MCS Buffer for Render Target(s) [DevIVB+]: [DevHSW:GT3]: Clear rectangle must be aligned to two times the number of pixels in the table shown below... Observed no piglit, gles3conform regressions with this patch. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65744
* winsys/intel: build with VISIBILITY_CFLAGSChia-I Wu2013-07-111-1/+2
| | | | There is no public symbol in this winsys.
* ilo: reduce PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS to 12Chia-I Wu2013-07-111-2/+3
| | | | So that there are at most (2^22 * 6) texels, lower than the 2^26 limit.
* ilo: correctly initialize undefined registers in fsChia-I Wu2013-07-111-5/+15
| | | | | Initialize all 4 channels of undefined registers (that is, TEMPs that are used before being assigned) in FS.
* radeonsi: Handle TGSI_OPCODE_DDX/Y using local memoryMichel Dänzer2013-07-104-2/+103
| | | | | | 16 more little piglits. Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: Handle TGSI_OPCODE_TXDMichel Dänzer2013-07-101-2/+25
| | | | | | One more little piglit. Reviewed-by: Tom Stellard <[email protected]>
* util/u_math: Use xmmintrin.h whenever possible.José Fonseca2013-07-101-9/+17
| | | | | | | | | | | | | It seems __builtin_ia32_ldmxcsr is only available on gcc and only when -msse is used. xmmintrin.h/pmmintrin.h provide portable intrinsics, but these too are only available with gcc when -msse/-msse3 are set. scons build always sets -msse on x86 builds, but autotools doesn't seem to. We could try to get this working on gcc x86 without -msse by emitting assembly, but I believe that in this day and age we really should be building Mesa with -msse and -msse2.
* ilo: honor surface padding requirementsChia-I Wu2013-07-101-0/+53
| | | | The PRM specifies several padding requirements that we failed to honor.
* util: treat denorm'ed floats like zeroZack Rusin2013-07-096-0/+83
| | | | | | | | | | | | | The D3D10 spec is very explicit about treatment of denorm floats and the behavior is exactly the same for them as it would be for -0 or +0. This makes our shading code match that behavior, since OpenGL doesn't care and on a few cpu's it's faster (worst case the same). Float16 conversions will likely break but we'll fix them in a follow up commit. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: Set ProfileMask properly for core profile.Matt Turner2013-07-091-2/+4
| | | | | | | Fixes MESA_GL_VERSION_OVERRIDE=3.2 egl-create-context-verify-gl-flavor. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-0974-237/+136
| | | | | | | | | | This makes brw_context inherit directly from gl_context; that was the only thing left in intel_context. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-0967-622/+483
| | | | | | | | | | Most functions no longer use intel_context, so this patch additionally removes the local "intel" variables to avoid compiler warnings. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::has_llc to brw_context.Kenneth Graunke2013-07-096-9/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::is_<platform> flags to brw_context.Kenneth Graunke2013-07-0929-64/+61
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move must_use/has_separate_stencil fields to brw_context.Kenneth Graunke2013-07-096-13/+11
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::has_hiz to brw_context.Kenneth Graunke2013-07-094-5/+4
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Free brw, not intel.Kenneth Graunke2013-07-091-1/+1
| | | | | | | | | | | | | Things worked out in the past because both brw and intel share the same memory address (by virtue of intel being the first member of brw). However, brw is what actually gets rzalloc'd (brw_context.c:285), so freeing that seems safer and more obvious. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Shorten context base class dereference chains.Kenneth Graunke2013-07-0912-31/+28
| | | | | | | | | ctx->DrawBuffer is much more sensible than brw->intel.ctx.DrawBuffer. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::has_swizzling to brw_context.Kenneth Graunke2013-07-095-11/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::intelScreen to brw_context.Kenneth Graunke2013-07-099-30/+24
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Delete unused intel_context::driFd field.Kenneth Graunke2013-07-092-3/+0
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
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