diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state_shaders.c | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a43821affb2..bef579f3ad2 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -294,7 +294,7 @@ si_emit_graphics(struct radv_device *device, /* Compute LATE_ALLOC_VS.LIMIT. */ unsigned num_cu_per_sh = physical_device->rad_info.min_good_cu_per_sa; - unsigned late_alloc_wave64 = 0; /* The limit is per SH. */ + unsigned late_alloc_wave64 = 0; /* The limit is per SA. */ unsigned late_alloc_wave64_gs = 0; unsigned cu_mask_vs = 0xffff; unsigned cu_mask_gs = 0xffff; @@ -329,7 +329,7 @@ si_emit_graphics(struct radv_device *device, if (!physical_device->rad_info.use_late_alloc) { late_alloc_wave64 = 0; } else if (num_cu_per_sh <= 4) { - /* Too few available compute units per SH. + /* Too few available compute units per SA. * Disallowing VS to run on one CU could hurt * us more than late VS allocation would help. * diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 2ce68c781d0..808f4af9192 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -5270,7 +5270,7 @@ static void si_init_config(struct si_context *sctx) /* Compute LATE_ALLOC_VS.LIMIT. */ unsigned num_cu_per_sh = sscreen->info.min_good_cu_per_sa; - unsigned late_alloc_wave64 = 0; /* The limit is per SH. */ + unsigned late_alloc_wave64 = 0; /* The limit is per SA. */ unsigned cu_mask_vs = 0xffff; unsigned cu_mask_gs = 0xffff; @@ -5294,7 +5294,7 @@ static void si_init_config(struct si_context *sctx) if (!sscreen->info.use_late_alloc) { late_alloc_wave64 = 0; } else if (num_cu_per_sh <= 4) { - /* Too few available compute units per SH. Disallowing + /* Too few available compute units per SA. Disallowing * VS to run on one CU could hurt us more than late VS * allocation would help. * diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 616747de88b..6cb0dbf0490 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -1144,7 +1144,7 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader /* Determine LATE_ALLOC_GS. */ unsigned num_cu_per_sh = sscreen->info.min_good_cu_per_sa; - unsigned late_alloc_wave64; /* The limit is per SH. */ + unsigned late_alloc_wave64; /* The limit is per SA. */ /* For Wave32, the hw will launch twice the number of late * alloc waves, so 1 == 2x wave32. |