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-rw-r--r--src/intel/vulkan/anv_pipeline.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_link.cpp15
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.c14
3 files changed, 12 insertions, 27 deletions
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 9104267090e..e2fbcaba3d3 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -190,16 +190,6 @@ anv_shader_compile_to_nir(struct anv_device *device,
nir_shader_gather_info(nir, entry_point->impl);
- nir_variable_mode indirect_mask = 0;
- if (compiler->glsl_compiler_options[stage].EmitNoIndirectInput)
- indirect_mask |= nir_var_shader_in;
- if (compiler->glsl_compiler_options[stage].EmitNoIndirectOutput)
- indirect_mask |= nir_var_shader_out;
- if (compiler->glsl_compiler_options[stage].EmitNoIndirectTemp)
- indirect_mask |= nir_var_local;
-
- nir_lower_indirect_derefs(nir, indirect_mask);
-
return nir;
}
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index 6f374286318..0d8a6267562 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -134,21 +134,6 @@ process_glsl_ir(struct brw_context *brw,
lower_noise(shader->ir);
lower_quadop_vector(shader->ir, false);
- do_copy_propagation(shader->ir);
-
- bool lowered_variable_indexing =
- lower_variable_index_to_cond_assign(shader->Stage, shader->ir,
- options->EmitNoIndirectInput,
- options->EmitNoIndirectOutput,
- options->EmitNoIndirectTemp,
- options->EmitNoIndirectUniform);
-
- if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
- perf_debug("Unsupported form of variable indexing in %s; falling "
- "back to very inefficient code generation\n",
- _mesa_shader_stage_to_abbrev(shader->Stage));
- }
-
bool progress;
do {
progress = false;
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 55b16cf851b..2697bb07c37 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -486,11 +486,21 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
/* Lower a bunch of stuff */
OPT_V(nir_lower_var_copies);
+ OPT_V(nir_lower_clip_cull_distance_arrays);
+
+ nir_variable_mode indirect_mask = 0;
+ if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectInput)
+ indirect_mask |= nir_var_shader_in;
+ if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectOutput)
+ indirect_mask |= nir_var_shader_out;
+ if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectTemp)
+ indirect_mask |= nir_var_local;
+
+ nir_lower_indirect_derefs(nir, indirect_mask);
+
/* Get rid of split copies */
nir = nir_optimize(nir, is_scalar);
- OPT_V(nir_lower_clip_cull_distance_arrays);
-
OPT(nir_remove_dead_variables, nir_var_local);
return nir;