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-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_emit.c4
-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_gmem.c4
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_emit.c2
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_gmem.c4
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_texture.c2
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_gmem.c2
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_texture.c2
-rw-r--r--src/gallium/drivers/freedreno/freedreno_batch_cache.c2
-rw-r--r--src/gallium/drivers/freedreno/freedreno_resource.c42
-rw-r--r--src/gallium/drivers/freedreno/freedreno_resource.h5
-rw-r--r--src/gallium/drivers/freedreno/freedreno_state.c2
11 files changed, 30 insertions, 41 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index aefbbea4a7c..b9e1af00e2c 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -209,7 +209,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
fd3_pipe_sampler_view(tex->textures[i]) :
&dummy_view;
struct fd_resource *rsc = fd_resource(view->base.texture);
- if (rsc && rsc->base.b.target == PIPE_BUFFER) {
+ if (rsc && rsc->base.target == PIPE_BUFFER) {
OUT_RELOC(ring, rsc->bo, view->base.u.buf.offset, 0, 0);
j = 1;
} else {
@@ -308,7 +308,7 @@ fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
*/
if (rsc->stencil && i == 0) {
rsc = rsc->stencil;
- format = fd_gmem_restore_format(rsc->base.b.format);
+ format = fd_gmem_restore_format(rsc->base.format);
}
/* note: PIPE_BUFFER disallowed for surfaces */
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 4bbbcf90ffa..3b299b81755 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -78,7 +78,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
*/
if (rsc->stencil) {
rsc = rsc->stencil;
- pformat = rsc->base.b.format;
+ pformat = rsc->base.format;
if (bases)
bases++;
}
@@ -324,7 +324,7 @@ emit_gmem2mem_surf(struct fd_batch *batch,
enum pipe_format format = psurf->format;
if (stencil) {
rsc = rsc->stencil;
- format = rsc->base.b.format;
+ format = rsc->base.format;
}
struct fd_resource_slice *slice = fd_resource_slice(rsc, psurf->u.tex.level);
uint32_t offset = fd_resource_offset(rsc, psurf->u.tex.level,
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 8262b45daad..dca3692b047 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -298,7 +298,7 @@ fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, unsigned nr_bufs,
*/
if (rsc->stencil && (i == 0)) {
rsc = rsc->stencil;
- format = fd_gmem_restore_format(rsc->base.b.format);
+ format = fd_gmem_restore_format(rsc->base.format);
}
/* note: PIPE_BUFFER disallowed for surfaces */
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index ebfbcabf67d..0f23880050e 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -79,7 +79,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
*/
if (rsc->stencil) {
rsc = rsc->stencil;
- pformat = rsc->base.b.format;
+ pformat = rsc->base.format;
if (bases)
bases++;
}
@@ -160,7 +160,7 @@ emit_gmem2mem_surf(struct fd_batch *batch, bool stencil,
if (stencil) {
debug_assert(rsc->stencil);
rsc = rsc->stencil;
- pformat = rsc->base.b.format;
+ pformat = rsc->base.format;
}
slice = &rsc->slices[psurf->u.tex.level];
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
index 4b2ca463458..fd0e4367b57 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
@@ -233,7 +233,7 @@ fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
rsc = rsc->stencil;
- format = rsc->base.b.format;
+ format = rsc->base.format;
}
so->base = *cso;
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index 7b655954742..e16ed1afa11 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -484,7 +484,7 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base,
// might be required for doing depth/stencil in bypass mode?
struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
enum a5xx_color_fmt format =
- fd5_pipe2color(fd_gmem_restore_format(rsc->base.b.format));
+ fd5_pipe2color(fd_gmem_restore_format(rsc->base.format));
OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
index da35f2a796a..2501b7a341c 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_texture.c
@@ -206,7 +206,7 @@ fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
rsc = rsc->stencil;
- format = rsc->base.b.format;
+ format = rsc->base.format;
}
so->base = *cso;
diff --git a/src/gallium/drivers/freedreno/freedreno_batch_cache.c b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
index def13285138..ae48b912e59 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch_cache.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
@@ -229,7 +229,7 @@ fd_bc_invalidate_batch(struct fd_batch *batch, bool destroy)
void
fd_bc_invalidate_resource(struct fd_resource *rsc, bool destroy)
{
- struct fd_screen *screen = fd_screen(rsc->base.b.screen);
+ struct fd_screen *screen = fd_screen(rsc->base.screen);
struct fd_batch *batch;
mtx_lock(&screen->lock);
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index 0de7efafd04..2b8831f65e5 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -98,7 +98,7 @@ rebind_resource(struct fd_context *ctx, struct pipe_resource *prsc)
static void
realloc_bo(struct fd_resource *rsc, uint32_t size)
{
- struct fd_screen *screen = fd_screen(rsc->base.b.screen);
+ struct fd_screen *screen = fd_screen(rsc->base.screen);
uint32_t flags = DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
DRM_FREEDRENO_GEM_TYPE_KMEM; /* TODO */
@@ -137,7 +137,7 @@ fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
unsigned level, const struct pipe_box *box)
{
struct pipe_context *pctx = &ctx->base;
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
bool fallback = false;
if (prsc->next)
@@ -188,8 +188,8 @@ fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
*/
struct fd_resource *shadow = fd_resource(pshadow);
- DBG("shadow: %p (%d) -> %p (%d)\n", rsc, rsc->base.b.reference.count,
- shadow, shadow->base.b.reference.count);
+ DBG("shadow: %p (%d) -> %p (%d)\n", rsc, rsc->base.reference.count,
+ shadow, shadow->base.reference.count);
/* TODO valid_buffer_range?? */
swap(rsc->bo, shadow->bo);
@@ -689,8 +689,10 @@ fd_resource_destroy(struct pipe_screen *pscreen,
static boolean
fd_resource_get_handle(struct pipe_screen *pscreen,
+ struct pipe_context *pctx,
struct pipe_resource *prsc,
- struct winsys_handle *handle)
+ struct winsys_handle *handle,
+ unsigned usage)
{
struct fd_resource *rsc = fd_resource(prsc);
@@ -698,19 +700,10 @@ fd_resource_get_handle(struct pipe_screen *pscreen,
rsc->slices[0].pitch * rsc->cpp, handle);
}
-
-static const struct u_resource_vtbl fd_resource_vtbl = {
- .resource_get_handle = fd_resource_get_handle,
- .resource_destroy = fd_resource_destroy,
- .transfer_map = fd_resource_transfer_map,
- .transfer_flush_region = fd_resource_transfer_flush_region,
- .transfer_unmap = fd_resource_transfer_unmap,
-};
-
static uint32_t
setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format format)
{
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
struct fd_screen *screen = fd_screen(prsc->screen);
enum util_format_layout layout = util_format_description(format)->layout;
uint32_t pitchalign = screen->gmem_alignw;
@@ -723,7 +716,7 @@ setup_slices(struct fd_resource *rsc, uint32_t alignment, enum pipe_format forma
*/
uint32_t layers_in_level = rsc->layer_first ? 1 : prsc->array_size;
- if (is_a5xx(screen) && (rsc->base.b.target >= PIPE_TEXTURE_2D))
+ if (is_a5xx(screen) && (rsc->base.target >= PIPE_TEXTURE_2D))
height = align(height, screen->gmem_alignh);
for (level = 0; level <= prsc->last_level; level++) {
@@ -820,7 +813,7 @@ fd_resource_create(struct pipe_screen *pscreen,
{
struct fd_screen *screen = fd_screen(pscreen);
struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
enum pipe_format format = tmpl->format;
uint32_t size, alignment;
@@ -842,8 +835,6 @@ fd_resource_create(struct pipe_screen *pscreen,
util_range_init(&rsc->valid_buffer_range);
- rsc->base.vtbl = &fd_resource_vtbl;
-
if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)
format = PIPE_FORMAT_Z32_FLOAT;
else if (screen->gpu_id < 400 &&
@@ -934,7 +925,7 @@ fd_resource_from_handle(struct pipe_screen *pscreen,
{
struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
struct fd_resource_slice *slice = &rsc->slices[0];
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
uint32_t pitchalign = fd_screen(pscreen)->gmem_alignw;
DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
@@ -959,7 +950,6 @@ fd_resource_from_handle(struct pipe_screen *pscreen,
if (!rsc->bo)
goto fail;
- rsc->base.vtbl = &fd_resource_vtbl;
rsc->cpp = util_format_get_blocksize(tmpl->format);
slice->pitch = handle->stride / rsc->cpp;
slice->offset = handle->offset;
@@ -1198,16 +1188,16 @@ fd_resource_screen_init(struct pipe_screen *pscreen)
{
pscreen->resource_create = fd_resource_create;
pscreen->resource_from_handle = fd_resource_from_handle;
- pscreen->resource_get_handle = u_resource_get_handle_vtbl;
- pscreen->resource_destroy = u_resource_destroy_vtbl;
+ pscreen->resource_get_handle = fd_resource_get_handle;
+ pscreen->resource_destroy = fd_resource_destroy;
}
void
fd_resource_context_init(struct pipe_context *pctx)
{
- pctx->transfer_map = u_transfer_map_vtbl;
- pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
- pctx->transfer_unmap = u_transfer_unmap_vtbl;
+ pctx->transfer_map = fd_resource_transfer_map;
+ pctx->transfer_flush_region = fd_resource_transfer_flush_region;
+ pctx->transfer_unmap = fd_resource_transfer_unmap;
pctx->buffer_subdata = u_default_buffer_subdata;
pctx->texture_subdata = u_default_texture_subdata;
pctx->create_surface = fd_create_surface;
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.h b/src/gallium/drivers/freedreno/freedreno_resource.h
index 539470c2b8b..2a2a6c2aa17 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.h
+++ b/src/gallium/drivers/freedreno/freedreno_resource.h
@@ -31,7 +31,6 @@
#include "util/list.h"
#include "util/u_range.h"
-#include "util/u_transfer.h"
#include "freedreno_batch.h"
#include "freedreno_util.h"
@@ -64,7 +63,7 @@ struct fd_resource_slice {
struct set;
struct fd_resource {
- struct u_resource base;
+ struct pipe_resource base;
struct fd_bo *bo;
uint32_t cpp;
enum pipe_format internal_format;
@@ -144,7 +143,7 @@ fd_transfer(struct pipe_transfer *ptrans)
static inline struct fd_resource_slice *
fd_resource_slice(struct fd_resource *rsc, unsigned level)
{
- assert(level <= rsc->base.b.last_level);
+ assert(level <= rsc->base.last_level);
return &rsc->slices[level];
}
diff --git a/src/gallium/drivers/freedreno/freedreno_state.c b/src/gallium/drivers/freedreno/freedreno_state.c
index eef7a3501ee..dd42aa02e75 100644
--- a/src/gallium/drivers/freedreno/freedreno_state.c
+++ b/src/gallium/drivers/freedreno/freedreno_state.c
@@ -432,7 +432,7 @@ fd_create_stream_output_target(struct pipe_context *pctx,
target->buffer_offset = buffer_offset;
target->buffer_size = buffer_size;
- assert(rsc->base.b.target == PIPE_BUFFER);
+ assert(rsc->base.target == PIPE_BUFFER);
util_range_add(&rsc->valid_buffer_range,
buffer_offset, buffer_offset + buffer_size);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 10:04:33 +0000