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-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c38
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c56
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.h3
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_obj.h1
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_validate.c10
5 files changed, 47 insertions, 61 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 51d3a46245f..97ae489ea96 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -916,12 +916,48 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
struct gl_context *ctx = &intel->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
- struct intel_region *region = irb->mt->region;
+ struct intel_region *region;
uint32_t *surf;
uint32_t tile_x, tile_y;
uint32_t format = 0;
gl_format rb_format = intel_rb_format(irb);
+ if (irb->tex_image && !brw->has_surface_tile_offset) {
+ intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
+
+ if (tile_x != 0 || tile_y != 0) {
+ /* Original gen4 hardware couldn't draw to a non-tile-aligned
+ * destination in a miptree unless you actually setup your renderbuffer
+ * as a miptree and used the fragile lod/array_index/etc. controls to
+ * select the image. So, instead, we just make a new single-level
+ * miptree and render into that.
+ */
+ struct intel_context *intel = intel_context(ctx);
+ struct intel_texture_image *intel_image =
+ intel_texture_image(irb->tex_image);
+ struct intel_mipmap_tree *new_mt;
+ int width, height, depth;
+
+ intel_miptree_get_dimensions_for_image(irb->tex_image, &width, &height, &depth);
+
+ new_mt = intel_miptree_create(intel, irb->tex_image->TexObject->Target,
+ intel_image->base.Base.TexFormat,
+ intel_image->base.Base.Level,
+ intel_image->base.Base.Level,
+ width, height, depth,
+ true);
+
+ intel_miptree_copy_teximage(intel, intel_image, new_mt);
+ intel_miptree_reference(&irb->mt, intel_image->mt);
+ intel_renderbuffer_set_draw_offset(irb);
+ intel_miptree_release(&new_mt);
+
+ mt = irb->mt;
+ }
+ }
+
+ region = irb->mt->region;
+
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, &brw->bind.surf_offset[unit]);
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 203d512ee8e..2d1a7985602 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -553,22 +553,6 @@ intel_renderbuffer_tile_offsets(struct intel_renderbuffer *irb,
}
}
-#ifndef I915
-static bool
-need_tile_offset_workaround(struct brw_context *brw,
- struct intel_renderbuffer *irb)
-{
- uint32_t tile_x, tile_y;
-
- if (brw->has_surface_tile_offset)
- return false;
-
- intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
-
- return tile_x != 0 || tile_y != 0;
-}
-#endif
-
/**
* Called by glFramebufferTexture[123]DEXT() (and other places) to
* prepare for rendering into texture memory. This might be called
@@ -626,42 +610,13 @@ intel_render_texture(struct gl_context * ctx,
return;
}
+ irb->tex_image = image;
+
DBG("Begin render %s texture tex=%u w=%d h=%d refcount=%d\n",
_mesa_get_format_name(image->TexFormat),
att->Texture->Name, image->Width, image->Height,
irb->Base.Base.RefCount);
- intel_image->used_as_render_target = true;
-
-#ifndef I915
- if (need_tile_offset_workaround(brw_context(ctx), irb)) {
- /* Original gen4 hardware couldn't draw to a non-tile-aligned
- * destination in a miptree unless you actually setup your
- * renderbuffer as a miptree and used the fragile
- * lod/array_index/etc. controls to select the image. So,
- * instead, we just make a new single-level miptree and render
- * into that.
- */
- struct intel_context *intel = intel_context(ctx);
- struct intel_mipmap_tree *new_mt;
- int width, height, depth;
-
- intel_miptree_get_dimensions_for_image(image, &width, &height, &depth);
-
- new_mt = intel_miptree_create(intel, image->TexObject->Target,
- intel_image->base.Base.TexFormat,
- intel_image->base.Base.Level,
- intel_image->base.Base.Level,
- width, height, depth,
- true);
-
- intel_miptree_copy_teximage(intel, intel_image, new_mt);
- intel_renderbuffer_set_draw_offset(irb);
-
- intel_miptree_reference(&irb->mt, intel_image->mt);
- intel_miptree_release(&new_mt);
- }
-#endif
/* update drawing region, etc */
intel_draw_buffer(ctx);
}
@@ -678,14 +633,13 @@ intel_finish_render_texture(struct gl_context * ctx,
struct gl_texture_object *tex_obj = att->Texture;
struct gl_texture_image *image =
tex_obj->Image[att->CubeMapFace][att->TextureLevel];
- struct intel_texture_image *intel_image = intel_texture_image(image);
+ struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer);
DBG("Finish render %s texture tex=%u\n",
_mesa_get_format_name(image->TexFormat), att->Texture->Name);
- /* Flag that this image may now be validated into the object's miptree. */
- if (intel_image)
- intel_image->used_as_render_target = false;
+ if (irb)
+ irb->tex_image = NULL;
/* Since we've (probably) rendered to the texture and will (likely) use
* it in the texture domain later on in this batchbuffer, flush the
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h
index a2c1b1a28dc..724f141535c 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.h
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -47,6 +47,9 @@ struct intel_renderbuffer
struct intel_mipmap_tree *mt; /**< The renderbuffer storage. */
drm_intel_bo *map_bo;
+ /* Current texture image this renderbuffer is attached to. */
+ struct gl_texture_image *tex_image;
+
/**
* \name Miptree view
* \{
diff --git a/src/mesa/drivers/dri/intel/intel_tex_obj.h b/src/mesa/drivers/dri/intel/intel_tex_obj.h
index 8b278ba9875..d1a5f05f9fc 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_obj.h
+++ b/src/mesa/drivers/dri/intel/intel_tex_obj.h
@@ -65,7 +65,6 @@ struct intel_texture_image
* Else there is no image data.
*/
struct intel_mipmap_tree *mt;
- bool used_as_render_target;
};
static INLINE struct intel_texture_object *
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index b96f2a45291..a63068b9cff 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -97,14 +97,8 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
/* skip too small size mipmap */
if (intelImage == NULL)
break;
- /* Need to import images in main memory or held in other trees.
- * If it's a render target, then its data isn't needed to be in
- * the object tree (otherwise we'd be FBO incomplete), and we need
- * to keep track of the image's MT as needing to be pulled in still,
- * or we'll lose the rendering that's done to it.
- */
- if (intelObj->mt != intelImage->mt &&
- !intelImage->used_as_render_target) {
+
+ if (intelObj->mt != intelImage->mt) {
intel_miptree_copy_teximage(intel, intelImage, intelObj->mt);
}
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 13:46:05 +0000