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-rw-r--r--src/mesa/drivers/dri/i965/gen7_sol_state.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index d3dcf49a36d..a4f46ea486c 100644
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -352,10 +352,6 @@ gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
assert(brw->gen == 7);
- /* Reset the SO buffer offsets to 0. */
- intel_batchbuffer_flush(brw);
- brw->batch.needs_sol_reset = true;
-
/* We're about to lose the information needed to compute the number of
* vertices written during the last Begin/EndTransformFeedback section,
* so we can't delay it any further.
@@ -370,6 +366,20 @@ gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
/* Store the starting value of the SO_NUM_PRIMS_WRITTEN counters. */
brw_save_primitives_written_counters(brw, brw_obj);
+ /* Reset the SO buffer offsets to 0. */
+ if (!can_do_pipelined_register_writes(brw->screen)) {
+ intel_batchbuffer_flush(brw);
+ brw->batch.needs_sol_reset = true;
+ } else {
+ for (int i = 0; i < 4; i++) {
+ BEGIN_BATCH(3);
+ OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
+ OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+ }
+ }
+
brw_obj->primitive_mode = mode;
}