diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/auxiliary/nir/tgsi_to_nir.c | 19 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_shader.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_program.c | 2 |
4 files changed, 17 insertions, 11 deletions
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index 65eca6f9e86..3d80ef06f13 100644 --- a/src/gallium/auxiliary/nir/tgsi_to_nir.c +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -1918,9 +1918,22 @@ ttn_add_output_stores(struct ttn_compile *c) nir_intrinsic_instr *store = nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output); unsigned loc = var->data.driver_location + i; - store->num_components = 4; - store->src[0].reg.reg = c->output_regs[loc].reg; - store->src[0].reg.base_offset = c->output_regs[loc].offset; + + nir_src src = nir_src_for_reg(c->output_regs[loc].reg); + src.reg.base_offset = c->output_regs[loc].offset; + + if (c->build.shader->stage == MESA_SHADER_FRAGMENT && + var->data.location == FRAG_RESULT_DEPTH) { + /* TGSI uses TGSI_SEMANTIC_POSITION.z for the depth output, while + * NIR uses a single float FRAG_RESULT_DEPTH. + */ + src = nir_src_for_ssa(nir_channel(b, nir_ssa_for_src(b, src, 4), 2)); + store->num_components = 1; + } else { + store->num_components = 4; + } + store->src[0] = src; + nir_intrinsic_set_base(store, loc); nir_intrinsic_set_write_mask(store, 0xf); store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c index 2331901ceba..63235663ffe 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c @@ -2498,12 +2498,6 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler, /* fixup input/outputs: */ for (i = 0; i < so->outputs_count; i++) { so->outputs[i].regid = ir->outputs[i*4]->regs[0]->num; - /* preserve hack for depth output.. tgsi writes depth to .z, - * but what we give the hw is the scalar register: - */ - if (so->shader->from_tgsi && (so->type == SHADER_FRAGMENT) && - (so->outputs[i].slot == FRAG_RESULT_DEPTH)) - so->outputs[i].regid += 2; } /* Note that some or all channels of an input may be unused: */ diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c index 87bdcf91a67..ac48132026c 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c @@ -294,7 +294,6 @@ ir3_shader_create(struct ir3_compiler *compiler, tgsi_dump(cso->tokens, 0); } nir = ir3_tgsi_to_nir(cso->tokens); - shader->from_tgsi = true; } /* do first pass optimization, ignoring the key: */ shader->nir = ir3_optimize_nir(shader, nir, NULL); diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 030643a1ca2..33721f16c72 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -1223,7 +1223,7 @@ emit_frag_end(struct vc4_compile *c) if (c->output_position_index != -1) { qir_FTOI_dest(c, qir_reg(QFILE_TLB_Z_WRITE, 0), qir_FMUL(c, - c->outputs[c->output_position_index + 2], + c->outputs[c->output_position_index], qir_uniform_f(c, 0xffffff)))->cond = discard_cond; } else { qir_MOV_dest(c, qir_reg(QFILE_TLB_Z_WRITE, 0), |