diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/svga/svga_screen.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/svga/svga_tgsi_vgpu10.c | 41 |
2 files changed, 43 insertions, 2 deletions
diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index 1febe873376..b66b560fcc0 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -345,6 +345,8 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_CUBE_MAP_ARRAY: case PIPE_CAP_INDEP_BLEND_FUNC: + case PIPE_CAP_SAMPLE_SHADING: + case PIPE_CAP_FORCE_PERSAMPLE_INTERP: return sws->have_sm4_1; /* Unsupported features */ @@ -364,7 +366,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TEXTURE_GATHER_SM5: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: case PIPE_CAP_TEXTURE_QUERY_LOD: - case PIPE_CAP_SAMPLE_SHADING: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: case PIPE_CAP_DRAW_INDIRECT: @@ -430,7 +431,6 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: case PIPE_CAP_DEPTH_BOUNDS_TEST: case PIPE_CAP_TGSI_TXQS: - case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c index 44e451332ee..756b67316a1 100644 --- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c +++ b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c @@ -415,6 +415,9 @@ check_register_index(struct svga_shader_emitter_v10 *emit, emit->register_overflow = TRUE; } break; + case VGPU10_OPERAND_TYPE_OUTPUT_COVERAGE_MASK: + /* nothing */ + break; default: assert(0); ; /* nothing */ @@ -921,6 +924,15 @@ emit_dst_register(struct svga_shader_emitter_v10 *emit, emit_dword(emit, operand0.value); return; } + else if (sem_name == TGSI_SEMANTIC_SAMPLEMASK) { + /* Fragment sample mask output */ + operand0.value = 0; + operand0.operandType = VGPU10_OPERAND_TYPE_OUTPUT_COVERAGE_MASK; + operand0.indexDimension = VGPU10_OPERAND_INDEX_0D; + operand0.numComponents = VGPU10_OPERAND_1_COMPONENT; + emit_dword(emit, operand0.value); + return; + } else if (index == emit->fs.color_out_index[0] && emit->fs.color_tmp_index != INVALID_INDEX) { /* replace OUTPUT[COLOR] with TEMP[COLOR]. We need to store the @@ -2272,6 +2284,31 @@ emit_fragdepth_output_declaration(struct svga_shader_emitter_v10 *emit) /** + * Emit the declaration for the fragment sample mask/coverage output. + */ +static void +emit_samplemask_output_declaration(struct svga_shader_emitter_v10 *emit) +{ + VGPU10OpcodeToken0 opcode0; + VGPU10OperandToken0 operand0; + VGPU10NameToken name_token; + + assert(emit->unit == PIPE_SHADER_FRAGMENT); + assert(emit->version >= 41); + + opcode0.value = operand0.value = name_token.value = 0; + + opcode0.opcodeType = VGPU10_OPCODE_DCL_OUTPUT; + operand0.operandType = VGPU10_OPERAND_TYPE_OUTPUT_COVERAGE_MASK; + operand0.numComponents = VGPU10_OPERAND_0_COMPONENT; + operand0.indexDimension = VGPU10_OPERAND_INDEX_0D; + operand0.mask = VGPU10_OPERAND_4_COMPONENT_MASK_ALL; + + emit_decl_instruction(emit, opcode0, operand0, name_token, 0, 1); +} + + +/** * Emit the declaration for a system value input/output. */ static void @@ -2671,6 +2708,10 @@ emit_output_declarations(struct svga_shader_emitter_v10 *emit) /* Fragment depth output */ emit_fragdepth_output_declaration(emit); } + else if (semantic_name == TGSI_SEMANTIC_SAMPLEMASK) { + /* Fragment depth output */ + emit_samplemask_output_declaration(emit); + } else { assert(!"Bad output semantic name"); } |