diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/amd/vulkan/radv_meta_blit2d.c | 4 | ||||
-rw-r--r-- | src/amd/vulkan/radv_private.h | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c index de3d5791611..e9aa951ff22 100644 --- a/src/amd/vulkan/radv_meta_blit2d.c +++ b/src/amd/vulkan/radv_meta_blit2d.c @@ -698,7 +698,7 @@ radv_device_finish_meta_blit2d_state(struct radv_device *device) state->blit2d_stencil_only_rp[j], &state->alloc); } - for (unsigned log2_samples = 0; log2_samples < 1 + MAX_SAMPLES_LOG2; ++log2_samples) { + for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; ++log2_samples) { for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { radv_DestroyPipelineLayout(radv_device_to_handle(device), state->blit2d[log2_samples].p_layouts[src], @@ -1310,7 +1310,7 @@ radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand) VkResult result; bool create_3d = device->physical_device->rad_info.chip_class == GFX9; - for (unsigned log2_samples = 0; log2_samples < 1 + MAX_SAMPLES_LOG2; log2_samples++) { + for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; log2_samples++) { for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { if (src == BLIT2D_SRC_TYPE_IMAGE_3D && !create_3d) continue; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 1158a30f767..0f5aac29484 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -475,7 +475,7 @@ struct radv_meta_state { VkPipeline depth_only_pipeline[NUM_DEPTH_CLEAR_PIPELINES]; VkPipeline stencil_only_pipeline[NUM_DEPTH_CLEAR_PIPELINES]; VkPipeline depthstencil_pipeline[NUM_DEPTH_CLEAR_PIPELINES]; - } clear[1 + MAX_SAMPLES_LOG2]; + } clear[MAX_SAMPLES_LOG2]; VkPipelineLayout clear_color_p_layout; VkPipelineLayout clear_depth_p_layout; @@ -518,7 +518,7 @@ struct radv_meta_state { VkPipeline depth_only_pipeline[5]; VkPipeline stencil_only_pipeline[5]; - } blit2d[1 + MAX_SAMPLES_LOG2]; + } blit2d[MAX_SAMPLES_LOG2]; VkRenderPass blit2d_render_passes[NUM_META_FS_KEYS][RADV_META_DST_LAYOUT_COUNT]; VkRenderPass blit2d_depth_only_rp[RADV_BLIT_DS_LAYOUT_COUNT]; @@ -623,7 +623,7 @@ struct radv_meta_state { VkPipeline decompress_pipeline; VkPipeline resummarize_pipeline; VkRenderPass pass; - } depth_decomp[1 + MAX_SAMPLES_LOG2]; + } depth_decomp[MAX_SAMPLES_LOG2]; struct { VkPipelineLayout p_layout; |