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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c43
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c37
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.h2
4 files changed, 41 insertions, 43 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index b335954e9a9..bdad9fbc2fb 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -583,7 +583,7 @@ struct brw_query_object {
struct brw_context
{
struct intel_context intel; /**< base class, must be first field */
- GLuint primitive;
+ GLuint primitive; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
GLboolean emit_state_always;
GLboolean has_surface_tile_offset;
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 39d38a57a4a..f58da557da1 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -79,53 +79,51 @@ static const GLenum reduced_prim[GL_POLYGON+1] = {
* programs be immune to the active primitive (ie. cope with all
* possibilities). That may not be realistic however.
*/
-static GLuint brw_set_prim(struct brw_context *brw,
- const struct _mesa_prim *prim)
+static void brw_set_prim(struct brw_context *brw,
+ const struct _mesa_prim *prim)
{
struct gl_context *ctx = &brw->intel.ctx;
- GLenum mode = prim->mode;
+ uint32_t hw_prim = prim_to_hw_prim[prim->mode];
DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode));
/* Slight optimization to avoid the GS program when not needed:
*/
- if (mode == GL_QUAD_STRIP &&
+ if (prim->mode == GL_QUAD_STRIP &&
ctx->Light.ShadeModel != GL_FLAT &&
ctx->Polygon.FrontMode == GL_FILL &&
ctx->Polygon.BackMode == GL_FILL)
- mode = GL_TRIANGLE_STRIP;
+ hw_prim = _3DPRIM_TRISTRIP;
if (prim->mode == GL_QUADS && prim->count == 4 &&
ctx->Light.ShadeModel != GL_FLAT &&
ctx->Polygon.FrontMode == GL_FILL &&
ctx->Polygon.BackMode == GL_FILL) {
- mode = GL_TRIANGLE_FAN;
+ hw_prim = _3DPRIM_TRIFAN;
}
- if (mode != brw->primitive) {
- brw->primitive = mode;
+ if (hw_prim != brw->primitive) {
+ brw->primitive = hw_prim;
brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
- if (reduced_prim[mode] != brw->intel.reduced_primitive) {
- brw->intel.reduced_primitive = reduced_prim[mode];
+ if (reduced_prim[prim->mode] != brw->intel.reduced_primitive) {
+ brw->intel.reduced_primitive = reduced_prim[prim->mode];
brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
}
}
-
- return prim_to_hw_prim[mode];
}
-static GLuint gen6_set_prim(struct brw_context *brw,
- const struct _mesa_prim *prim)
+static void gen6_set_prim(struct brw_context *brw,
+ const struct _mesa_prim *prim)
{
+ uint32_t hw_prim = prim_to_hw_prim[prim->mode];
+
DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode));
- if (prim->mode != brw->primitive) {
- brw->primitive = prim->mode;
+ if (hw_prim != brw->primitive) {
+ brw->primitive = hw_prim;
brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
}
-
- return prim_to_hw_prim[mode];
}
@@ -331,7 +329,6 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
intel_prepare_render(intel);
for (i = 0; i < nr_prims; i++) {
- uint32_t hw_prim;
int estimated_max_prim_size;
estimated_max_prim_size = 512; /* batchbuffer commands */
@@ -349,9 +346,9 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
intel_batchbuffer_require_space(intel, estimated_max_prim_size, false);
if (intel->gen < 6)
- hw_prim = brw_set_prim(brw, &prim[i]);
+ brw_set_prim(brw, &prim[i]);
else
- hw_prim = gen6_set_prim(brw, &prim[i]);
+ gen6_set_prim(brw, &prim[i]);
if (brw->state.dirty.brw) {
brw_validate_state(brw);
@@ -388,9 +385,9 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
}
if (intel->gen >= 7)
- gen7_emit_prim(brw, &prim[i], hw_prim);
+ gen7_emit_prim(brw, &prim[i], brw->primitive);
else
- brw_emit_prim(brw, &prim[i], hw_prim);
+ brw_emit_prim(brw, &prim[i], brw->primitive);
intel->no_batch_wrap = GL_FALSE;
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 3b56aae821b..91cdb1e72e5 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -86,13 +86,13 @@ static void compile_gs_prog( struct brw_context *brw,
*/
switch (key->primitive) {
- case GL_QUADS:
+ case _3DPRIM_QUADLIST:
brw_gs_quads( &c, key );
break;
- case GL_QUAD_STRIP:
+ case _3DPRIM_QUADSTRIP:
brw_gs_quad_strip( &c, key );
break;
- case GL_LINE_LOOP:
+ case _3DPRIM_LINELOOP:
brw_gs_lines( &c );
break;
default:
@@ -122,17 +122,18 @@ static void compile_gs_prog( struct brw_context *brw,
ralloc_free(mem_ctx);
}
-static const GLenum gs_prim[GL_POLYGON+1] = {
- GL_POINTS,
- GL_LINES,
- GL_LINE_LOOP,
- GL_LINES,
- GL_TRIANGLES,
- GL_TRIANGLES,
- GL_TRIANGLES,
- GL_QUADS,
- GL_QUAD_STRIP,
- GL_TRIANGLES
+static const GLenum gs_prim[] = {
+ [_3DPRIM_POINTLIST] = _3DPRIM_POINTLIST,
+ [_3DPRIM_LINELIST] = _3DPRIM_LINELIST,
+ [_3DPRIM_LINELOOP] = _3DPRIM_LINELOOP,
+ [_3DPRIM_LINESTRIP] = _3DPRIM_LINELIST,
+ [_3DPRIM_TRILIST] = _3DPRIM_TRILIST,
+ [_3DPRIM_TRISTRIP] = _3DPRIM_TRILIST,
+ [_3DPRIM_TRIFAN] = _3DPRIM_TRILIST,
+ [_3DPRIM_QUADLIST] = _3DPRIM_QUADLIST,
+ [_3DPRIM_QUADSTRIP] = _3DPRIM_QUADSTRIP,
+ [_3DPRIM_POLYGON] = _3DPRIM_TRILIST,
+ [_3DPRIM_RECTLIST] = _3DPRIM_RECTLIST,
};
static void populate_key( struct brw_context *brw,
@@ -151,7 +152,7 @@ static void populate_key( struct brw_context *brw,
/* _NEW_LIGHT */
key->pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION);
- if (key->primitive == GL_QUADS && ctx->Light.ShadeModel != GL_FLAT) {
+ if (key->primitive == _3DPRIM_QUADLIST && ctx->Light.ShadeModel != GL_FLAT) {
/* Provide consistent primitive order with brw_set_prim's
* optimization of single quads to trifans.
*/
@@ -163,9 +164,9 @@ static void populate_key( struct brw_context *brw,
key->need_gs_prog = (intel->gen >= 6)
? 0
- : (brw->primitive == GL_QUADS ||
- brw->primitive == GL_QUAD_STRIP ||
- brw->primitive == GL_LINE_LOOP);
+ : (brw->primitive == _3DPRIM_QUADLIST ||
+ brw->primitive == _3DPRIM_QUADSTRIP ||
+ brw->primitive == _3DPRIM_LINELOOP);
}
/* Calculate interpolants for triangle and line rasterization.
diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h
index cee7467628b..0e4ff3fedf6 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_gs.h
@@ -41,7 +41,7 @@
struct brw_gs_prog_key {
GLbitfield64 attrs;
- GLuint primitive:4;
+ GLuint primitive:8; /**< Hardware primitive, such as _3DPRIM_TRILIST. */
GLuint pv_first:1;
GLuint need_gs_prog:1;
GLuint userclip_active:1;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 08:32:54 +0000