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-rw-r--r--src/amd/Makefile.sources2
-rw-r--r--src/amd/common/ac_nir_to_llvm.h1
-rw-r--r--src/amd/common/ac_shader_info.h76
-rw-r--r--src/amd/common/meson.build2
-rw-r--r--src/amd/vulkan/Makefile.sources1
-rw-r--r--src/amd/vulkan/meson.build1
-rw-r--r--src/amd/vulkan/radv_nir_to_llvm.c2
-rw-r--r--src/amd/vulkan/radv_private.h7
-rw-r--r--src/amd/vulkan/radv_shader.c4
-rw-r--r--src/amd/vulkan/radv_shader.h38
-rw-r--r--src/amd/vulkan/radv_shader_info.c (renamed from src/amd/common/ac_shader_info.c)28
11 files changed, 63 insertions, 99 deletions
diff --git a/src/amd/Makefile.sources b/src/amd/Makefile.sources
index f57dd403c5f..aee3393b158 100644
--- a/src/amd/Makefile.sources
+++ b/src/amd/Makefile.sources
@@ -46,8 +46,6 @@ AMD_COMPILER_FILES = \
common/ac_llvm_util.h \
common/ac_lower_subgroups.c \
common/ac_shader_abi.h \
- common/ac_shader_info.c \
- common/ac_shader_info.h \
common/ac_shader_util.c \
common/ac_shader_util.h
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 0e4d0e302a8..1112369968b 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -29,7 +29,6 @@
#include "llvm-c/TargetMachine.h"
#include "amd_family.h"
#include "../vulkan/radv_descriptor_set.h"
-#include "ac_shader_info.h"
#include "compiler/shader_enums.h"
struct ac_shader_binary;
struct ac_shader_config;
diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
deleted file mode 100644
index 12a1dcf9156..00000000000
--- a/src/amd/common/ac_shader_info.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright © 2017 Red Hat
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#ifndef AC_SHADER_INFO_H
-#define AC_SHADER_INFO_H
-
-#include "compiler/shader_enums.h"
-
-struct nir_shader;
-struct ac_nir_compiler_options;
-
-struct ac_shader_info {
- bool loads_push_constants;
- uint32_t desc_set_used_mask;
- bool needs_multiview_view_index;
- bool uses_invocation_id;
- bool uses_prim_id;
- struct {
- uint8_t input_usage_mask[VERT_ATTRIB_MAX];
- uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
- bool has_vertex_buffers; /* needs vertex buffers and base/start */
- bool needs_draw_id;
- bool needs_instance_id;
- } vs;
- struct {
- uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
- } tes;
- struct {
- bool force_persample;
- bool needs_sample_positions;
- bool uses_input_attachments;
- bool writes_memory;
- bool writes_z;
- bool writes_stencil;
- bool writes_sample_mask;
- bool has_pcoord;
- bool prim_id_input;
- bool layer_input;
- } ps;
- struct {
- bool uses_grid_size;
- bool uses_block_id[3];
- bool uses_thread_id[3];
- bool uses_local_invocation_idx;
- } cs;
-};
-
-/* A NIR pass to gather all the info needed to optimise the allocation patterns
- * for the RADV user sgprs
- */
-void
-ac_nir_shader_info_pass(const struct nir_shader *nir,
- const struct ac_nir_compiler_options *options,
- struct ac_shader_info *info);
-
-#endif
diff --git a/src/amd/common/meson.build b/src/amd/common/meson.build
index 6c5c2f45ac5..01db536c06e 100644
--- a/src/amd/common/meson.build
+++ b/src/amd/common/meson.build
@@ -37,8 +37,6 @@ amd_common_files = files(
'ac_llvm_util.h',
'ac_lower_subgroups.c',
'ac_shader_abi.h',
- 'ac_shader_info.c',
- 'ac_shader_info.h',
'ac_shader_util.c',
'ac_shader_util.h',
'ac_nir_to_llvm.c',
diff --git a/src/amd/vulkan/Makefile.sources b/src/amd/vulkan/Makefile.sources
index 47ff580e883..b0a8f8b97d8 100644
--- a/src/amd/vulkan/Makefile.sources
+++ b/src/amd/vulkan/Makefile.sources
@@ -60,6 +60,7 @@ VULKAN_FILES := \
radv_private.h \
radv_radeon_winsys.h \
radv_shader.c \
+ radv_shader_info.c \
radv_shader.h \
radv_query.c \
radv_util.c \
diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build
index 1fd6b755505..c3a6a8182b8 100644
--- a/src/amd/vulkan/meson.build
+++ b/src/amd/vulkan/meson.build
@@ -88,6 +88,7 @@ libradv_files = files(
'radv_radeon_winsys.h',
'radv_shader.c',
'radv_shader.h',
+ 'radv_shader_info.c',
'radv_query.c',
'radv_util.c',
'radv_util.h',
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 9551def55e0..25ee3b91fc6 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -3007,7 +3007,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
memset(shader_info, 0, sizeof(*shader_info));
for(int i = 0; i < shader_count; ++i)
- ac_nir_shader_info_pass(shaders[i], options, &shader_info->info);
+ radv_nir_shader_info_pass(shaders[i], options, &shader_info->info);
for (i = 0; i < RADV_UD_MAX_SETS; i++)
shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 23815b9ccdf..913fbe7f934 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1697,6 +1697,13 @@ void radv_compile_nir_shader(LLVMTargetMachineRef tm,
const struct ac_nir_compiler_options *options,
bool dump_shader);
+/* radv_shader_info.h */
+struct radv_shader_info;
+
+void radv_nir_shader_info_pass(const struct nir_shader *nir,
+ const struct ac_nir_compiler_options *options,
+ struct radv_shader_info *info);
+
struct radeon_winsys_sem;
#define RADV_DEFINE_HANDLE_CASTS(__radv_type, __VkType) \
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 1a5e76b8cfb..e11f19323f7 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -383,7 +383,7 @@ radv_fill_shader_variant(struct radv_device *device,
case MESA_SHADER_FRAGMENT:
break;
case MESA_SHADER_COMPUTE: {
- struct ac_shader_info *info = &variant->info.info;
+ struct radv_shader_info *info = &variant->info.info;
variant->rsrc2 |=
S_00B84C_TGID_X_EN(info->cs.uses_block_id[0]) |
S_00B84C_TGID_Y_EN(info->cs.uses_block_id[1]) |
@@ -401,7 +401,7 @@ radv_fill_shader_variant(struct radv_device *device,
if (device->physical_device->rad_info.chip_class >= GFX9 &&
stage == MESA_SHADER_GEOMETRY) {
- struct ac_shader_info *info = &variant->info.info;
+ struct radv_shader_info *info = &variant->info.info;
unsigned es_type = variant->info.gs.es_type;
unsigned gs_vgpr_comp_cnt, es_vgpr_comp_cnt;
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index b0517b73a42..a9b465cd80c 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -53,6 +53,42 @@ struct radv_shader_module {
char data[0];
};
+struct radv_shader_info {
+ bool loads_push_constants;
+ uint32_t desc_set_used_mask;
+ bool needs_multiview_view_index;
+ bool uses_invocation_id;
+ bool uses_prim_id;
+ struct {
+ uint8_t input_usage_mask[VERT_ATTRIB_MAX];
+ uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
+ bool has_vertex_buffers; /* needs vertex buffers and base/start */
+ bool needs_draw_id;
+ bool needs_instance_id;
+ } vs;
+ struct {
+ uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
+ } tes;
+ struct {
+ bool force_persample;
+ bool needs_sample_positions;
+ bool uses_input_attachments;
+ bool writes_memory;
+ bool writes_z;
+ bool writes_stencil;
+ bool writes_sample_mask;
+ bool has_pcoord;
+ bool prim_id_input;
+ bool layer_input;
+ } ps;
+ struct {
+ bool uses_grid_size;
+ bool uses_block_id[3];
+ bool uses_thread_id[3];
+ bool uses_local_invocation_idx;
+ } cs;
+};
+
struct radv_userdata_info {
int8_t sgpr_idx;
uint8_t num_sgprs;
@@ -83,7 +119,7 @@ struct radv_es_output_info {
struct radv_shader_variant_info {
struct radv_userdata_locations user_sgprs_locs;
- struct ac_shader_info info;
+ struct radv_shader_info info;
unsigned num_user_sgprs;
unsigned num_input_sgprs;
unsigned num_input_vgprs;
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 883358faaae..a6d8033bcb1 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -20,19 +20,19 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
+#include "radv_private.h"
+#include "radv_shader.h"
#include "nir/nir.h"
-#include "ac_shader_info.h"
-#include "ac_nir_to_llvm.h"
static void mark_sampler_desc(const nir_variable *var,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
info->desc_set_used_mask |= (1 << var->data.descriptor_set);
}
static void
gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
switch (instr->intrinsic) {
case nir_intrinsic_interp_var_at_sample:
@@ -173,7 +173,7 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
static void
gather_tex_info(const nir_shader *nir, const nir_tex_instr *instr,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
if (instr->sampler)
mark_sampler_desc(instr->sampler->var, info);
@@ -183,7 +183,7 @@ gather_tex_info(const nir_shader *nir, const nir_tex_instr *instr,
static void
gather_info_block(const nir_shader *nir, const nir_block *block,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
nir_foreach_instr(instr, block) {
switch (instr->type) {
@@ -201,7 +201,7 @@ gather_info_block(const nir_shader *nir, const nir_block *block,
static void
gather_info_input_decl_vs(const nir_shader *nir, const nir_variable *var,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
int idx = var->data.location;
@@ -211,7 +211,7 @@ gather_info_input_decl_vs(const nir_shader *nir, const nir_variable *var,
static void
gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
const struct glsl_type *type = glsl_without_array(var->type);
int idx = var->data.location;
@@ -238,7 +238,7 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
static void
gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
switch (nir->info.stage) {
case MESA_SHADER_VERTEX:
@@ -254,7 +254,7 @@ gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
static void
gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
int idx = var->data.location;
@@ -275,7 +275,7 @@ gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
static void
gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
- struct ac_shader_info *info)
+ struct radv_shader_info *info)
{
switch (nir->info.stage) {
case MESA_SHADER_FRAGMENT:
@@ -287,9 +287,9 @@ gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
}
void
-ac_nir_shader_info_pass(const struct nir_shader *nir,
- const struct ac_nir_compiler_options *options,
- struct ac_shader_info *info)
+radv_nir_shader_info_pass(const struct nir_shader *nir,
+ const struct ac_nir_compiler_options *options,
+ struct radv_shader_info *info)
{
struct nir_function *func =
(struct nir_function *)exec_list_get_head_const(&nir->functions);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 23:17:59 +0000