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-rw-r--r--src/amd/common/ac_llvm_build.c9
-rw-r--r--src/amd/common/ac_llvm_build.h3
-rw-r--r--src/amd/common/ac_nir_to_llvm.c6
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c25
4 files changed, 20 insertions, 23 deletions
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index cc1eaf1385c..08fedc7bf41 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -547,10 +547,9 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vdata,
unsigned num_channels,
- LLVMValueRef vaddr,
+ LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
- bool offen,
bool glc,
bool slc)
{
@@ -566,12 +565,12 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
rsrc,
vdata,
LLVMConstInt(ctx->i32, num_channels, 0),
- vaddr,
+ voffset ? voffset : LLVMGetUndef(ctx->i32),
soffset,
LLVMConstInt(ctx->i32, inst_offset, 0),
LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
- LLVMConstInt(ctx->i32, offen, 0),
+ LLVMConstInt(ctx->i32, voffset != NULL, 0),
LLVMConstInt(ctx->i32, 0, 0), /* idxen */
LLVMConstInt(ctx->i32, glc, 0),
LLVMConstInt(ctx->i32, slc, 0),
@@ -579,7 +578,7 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
};
/* The instruction offset field has 12 bits */
- assert(offen || inst_offset < (1 << 12));
+ assert(voffset || inst_offset < (1 << 12));
/* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
unsigned func = CLAMP(num_channels, 1, 3) - 1;
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 65a9a055a72..78df441b6dc 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -126,10 +126,9 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vdata,
unsigned num_channels,
- LLVMValueRef vaddr,
+ LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
- bool offen,
bool glc,
bool slc);
LLVMValueRef
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d7c9d5968d9..c3634701dad 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3159,7 +3159,7 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring,
out_val, 1,
voffset, ctx->gs2vs_offset, 0,
- 1, 1, 1);
+ 1, 1);
}
idx += slot_inc;
}
@@ -4673,9 +4673,9 @@ handle_es_outputs_post(struct nir_to_llvm_context *ctx)
ac_build_buffer_store_dword(&ctx->ac,
ctx->esgs_ring,
out_val, 1,
- LLVMGetUndef(ctx->i32), ctx->es2gs_offset,
+ NULL, ctx->es2gs_offset,
(4 * param_index + j + start) * 4,
- 0, 1, 1);
+ 1, 1);
}
}
ctx->shader_info->vs.esgs_itemsize = (max_output_written + 1) * 16;
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 42f96b6610c..adf2b6065e8 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1049,7 +1049,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
if (inst->Dst[0].Register.WriteMask != 0xF && !is_tess_factor) {
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
buf_addr, base,
- 4 * chan_index, 1, 1, 0);
+ 4 * chan_index, 1, 0);
}
}
@@ -1057,7 +1057,7 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
LLVMValueRef value = lp_build_gather_values(bld_base->base.gallivm,
values, 4);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buf_addr,
- base, 0, 1, 1, 0);
+ base, 0, 1, 0);
}
}
@@ -2087,7 +2087,7 @@ static void emit_streamout_output(struct si_shader_context *ctx,
vdata, num_comps,
so_write_offsets[buf_idx],
LLVMConstInt(ctx->i32, 0, 0),
- stream_out->dst_offset * 4, 1, 1, 1);
+ stream_out->dst_offset * 4, 1, 1);
}
/**
@@ -2412,7 +2412,7 @@ static void si_copy_tcs_inputs(struct lp_build_tgsi_context *bld_base)
lds_ptr);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buffer_addr,
- buffer_offset, 0, 1, 1, 0);
+ buffer_offset, 0, 1, 0);
}
}
@@ -2527,18 +2527,18 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
ac_build_buffer_store_dword(&ctx->ac, buffer,
lp_build_const_int32(gallivm, 0x80000000),
1, lp_build_const_int32(gallivm, 0), tf_base,
- 0, 1, 1, 0);
+ 0, 1, 0);
lp_build_endif(&inner_if_ctx);
/* Store the tessellation factors. */
ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
MIN2(stride, 4), byteoffset, tf_base,
- 4, 1, 1, 0);
+ 4, 1, 0);
if (vec1)
ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
stride - 4, byteoffset, tf_base,
- 20, 1, 1, 0);
+ 20, 1, 0);
/* Store the tess factors into the offchip buffer if TES reads them. */
if (shader->key.part.tcs.epilog.tes_reads_tess_factors) {
@@ -2560,7 +2560,7 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec,
outer_comps, tf_outer_offset,
- base, 0, 1, 1, 0);
+ base, 0, 1, 0);
if (inner_comps) {
param_inner = si_shader_io_get_unique_index(
TGSI_SEMANTIC_TESSINNER, 0);
@@ -2571,7 +2571,7 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
lp_build_gather_values(gallivm, inner, inner_comps);
ac_build_buffer_store_dword(&ctx->ac, buf, inner_vec,
inner_comps, tf_inner_offset,
- base, 0, 1, 1, 0);
+ base, 0, 1, 0);
}
}
@@ -2693,10 +2693,9 @@ static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context *bld_base)
ac_build_buffer_store_dword(&ctx->ac,
ctx->esgs_ring,
- out_val, 1,
- LLVMGetUndef(ctx->i32), soffset,
+ out_val, 1, NULL, soffset,
(4 * param_index + chan) * 4,
- 0, 1, 1);
+ 1, 1);
}
}
}
@@ -5061,7 +5060,7 @@ static void si_llvm_emit_vertex(
ctx->gsvs_ring[stream],
out_val, 1,
voffset, soffset, 0,
- 1, 1, 1);
+ 1, 1);
}
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-18 15:43:09 +0000