diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/intel/compiler/brw_disasm.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index e1cc0f4925f..8b7047db00f 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -1339,9 +1339,18 @@ imm(FILE *file, const struct gen_device_info *devinfo, enum brw_reg_type type, format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst)); break; case BRW_REGISTER_TYPE_F: - format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96)); - pad(file, 48); - format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst)); + /* The DIM instruction's src0 uses an F type but contains a + * 64-bit immediate + */ + if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_DIM) { + format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 64)); + pad(file, 48); + format(file, "/* %-gF */", brw_inst_imm_df(devinfo, inst)); + } else { + format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96)); + pad(file, 48); + format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst)); + } break; case BRW_REGISTER_TYPE_DF: format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64)); |