diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index c0dfe4f3999..3564041e645 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -610,6 +610,60 @@ #define HSW_SCS_BLUE 6 #define HSW_SCS_ALPHA 7 +/* SAMPLER_STATE DW0 */ +#define BRW_SAMPLER_DISABLE (1 << 31) +#define BRW_SAMPLER_LOD_PRECLAMP_ENABLE (1 << 28) +#define GEN6_SAMPLER_MIN_MAG_NOT_EQUAL (1 << 27) /* Gen6 only */ +#define BRW_SAMPLER_BASE_MIPLEVEL_MASK INTEL_MASK(26, 22) +#define BRW_SAMPLER_BASE_MIPLEVEL_SHIFT 22 +#define BRW_SAMPLER_MIP_FILTER_MASK INTEL_MASK(21, 20) +#define BRW_SAMPLER_MIP_FILTER_SHIFT 20 +#define BRW_SAMPLER_MAG_FILTER_MASK INTEL_MASK(19, 17) +#define BRW_SAMPLER_MAG_FILTER_SHIFT 17 +#define BRW_SAMPLER_MIN_FILTER_MASK INTEL_MASK(16, 14) +#define BRW_SAMPLER_MIN_FILTER_SHIFT 14 +#define GEN4_SAMPLER_LOD_BIAS_MASK INTEL_MASK(13, 3) +#define GEN4_SAMPLER_LOD_BIAS_SHIFT 3 +#define GEN4_SAMPLER_SHADOW_FUNCTION_MASK INTEL_MASK(2, 0) +#define GEN4_SAMPLER_SHADOW_FUNCTION_SHIFT 0 + +#define GEN7_SAMPLER_LOD_BIAS_MASK INTEL_MASK(13, 1) +#define GEN7_SAMPLER_LOD_BIAS_SHIFT 1 +#define GEN7_SAMPLER_EWA_ANISOTROPIC_ALGORIHTM (1 << 0) + +/* SAMPLER_STATE DW1 */ +#define GEN4_SAMPLER_MIN_LOD_MASK INTEL_MASK(31, 22) +#define GEN4_SAMPLER_MIN_LOD_SHIFT 22 +#define GEN4_SAMPLER_MAX_LOD_MASK INTEL_MASK(21, 12) +#define GEN4_SAMPLER_MAX_LOD_SHIFT 12 +#define GEN4_SAMPLER_CUBE_CONTROL_OVERRIDE (1 << 9) +/* Wrap modes are in DW1 on Gen4-6 and DW3 on Gen7+ */ +#define BRW_SAMPLER_TCX_WRAP_MODE_MASK INTEL_MASK(8, 6) +#define BRW_SAMPLER_TCX_WRAP_MODE_SHIFT 6 +#define BRW_SAMPLER_TCY_WRAP_MODE_MASK INTEL_MASK(5, 3) +#define BRW_SAMPLER_TCY_WRAP_MODE_SHIFT 3 +#define BRW_SAMPLER_TCZ_WRAP_MODE_MASK INTEL_MASK(2, 0) +#define BRW_SAMPLER_TCZ_WRAP_MODE_SHIFT 0 + +#define GEN7_SAMPLER_MIN_LOD_MASK INTEL_MASK(31, 20) +#define GEN7_SAMPLER_MIN_LOD_SHIFT 20 +#define GEN7_SAMPLER_MAX_LOD_MASK INTEL_MASK(19, 8) +#define GEN7_SAMPLER_MAX_LOD_SHIFT 8 +#define GEN7_SAMPLER_SHADOW_FUNCTION_MASK INTEL_MASK(3, 1) +#define GEN7_SAMPLER_SHADOW_FUNCTION_SHIFT 1 +#define GEN7_SAMPLER_CUBE_CONTROL_OVERRIDE (1 << 0) + +/* SAMPLER_STATE DW2 - border color pointer */ + +/* SAMPLER_STATE DW3 */ +#define BRW_SAMPLER_MAX_ANISOTROPY_MASK INTEL_MASK(21, 19) +#define BRW_SAMPLER_MAX_ANISOTROPY_SHIFT 19 +#define BRW_SAMPLER_ADDRESS_ROUNDING_MASK INTEL_MASK(18, 13) +#define BRW_SAMPLER_ADDRESS_ROUNDING_SHIFT 13 +#define GEN7_SAMPLER_NON_NORMALIZED_COORDINATES (1 << 10) +/* Gen7+ wrap modes reuse the same BRW_SAMPLER_TC*_WRAP_MODE enums. */ +#define GEN6_SAMPLER_NON_NORMALIZED_COORDINATES (1 << 0) + enum brw_wrap_mode { BRW_TEXCOORDMODE_WRAP = 0, BRW_TEXCOORDMODE_MIRROR = 1, |