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-rw-r--r--src/gallium/auxiliary/util/u_screen.c1
-rw-r--r--src/gallium/docs/source/screen.rst3
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c4
-rw-r--r--src/gallium/include/pipe/p_defines.h1
-rw-r--r--src/mesa/state_tracker/st_extensions.c6
5 files changed, 13 insertions, 2 deletions
diff --git a/src/gallium/auxiliary/util/u_screen.c b/src/gallium/auxiliary/util/u_screen.c
index d19d604e0c5..7a37fe78468 100644
--- a/src/gallium/auxiliary/util/u_screen.c
+++ b/src/gallium/auxiliary/util/u_screen.c
@@ -304,6 +304,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index 485248261df..d589bad30ef 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -458,6 +458,9 @@ subpixel precision bias in bits during conservative rasterization.
TGSI_PROPERTY_GS_INVOCATIONS.
* ``PIPE_CAP_MAX_SHADER_BUFFER_SIZE``: Maximum supported size for binding
with set_shader_buffers.
+* ``PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS``: Maximum total number of shader
+ buffers. A value of 0 means the sum of all per-shader stage maximums (see
+ ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``).
.. _pipe_capf:
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index bcc72c8b698..f1e80a8f827 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -380,8 +380,12 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;
+
+ /* shader buffer objects */
case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
return 1 << 27;
+ case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+ return 8;
/* Unsupported features. */
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index 3bc908d1a0e..b7c7d8fcbd5 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -818,6 +818,7 @@ enum pipe_cap
PIPE_CAP_MAX_GS_INVOCATIONS,
PIPE_CAP_MAX_SHADER_BUFFER_SIZE,
PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE,
+ PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
};
/**
diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index 9ecdd26edda..0fc13d0dd24 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -470,8 +470,10 @@ void st_init_limits(struct pipe_screen *screen,
c->ShaderStorageBufferOffsetAlignment =
screen->get_param(screen, PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT);
if (c->ShaderStorageBufferOffsetAlignment) {
- /* for hw atomic counters leaves these at default for now */
- if (ssbo_atomic) {
+ c->MaxCombinedShaderStorageBlocks =
+ MIN2(screen->get_param(screen, PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS),
+ MAX_COMBINED_SHADER_STORAGE_BUFFERS);
+ if (!c->MaxCombinedShaderStorageBlocks) {
c->MaxCombinedShaderStorageBlocks =
c->Program[MESA_SHADER_VERTEX].MaxShaderStorageBlocks +
c->Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks +