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-rw-r--r--src/mesa/drivers/dri/i965/brw_meta_fast_clear.c4
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c17
2 files changed, 19 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
index a864143e6dc..c0c8dfa608d 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
@@ -340,6 +340,10 @@ is_color_fast_clear_compatible(struct brw_context *brw,
const union gl_color_union *color)
{
if (_mesa_is_format_integer_color(format))
+ if (brw->gen >= 8) {
+ perf_debug("Integer fast clear not enabled for (%s)",
+ _mesa_get_format_name(format));
+ }
return false;
for (int i = 0; i < 4; i++) {
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 24a5c3dc666..8616c0193c8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -198,10 +198,23 @@ intel_is_non_msrt_mcs_buffer_supported(struct brw_context *brw,
return false;
if (mt->cpp != 4 && mt->cpp != 8 && mt->cpp != 16)
return false;
- if (mt->first_level != 0 || mt->last_level != 0)
+ if (mt->first_level != 0 || mt->last_level != 0) {
+ if (brw->gen >= 8) {
+ perf_debug("Multi-LOD fast clear - giving up (%dx%dx%d).\n",
+ mt->logical_width0, mt->logical_height0, mt->last_level);
+ }
+
return false;
- if (mt->physical_depth0 != 1)
+ }
+ if (mt->physical_depth0 != 1) {
+ if (brw->gen >= 8) {
+ perf_debug("Layered fast clear - giving up. (%dx%d%d)\n",
+ mt->logical_width0, mt->logical_height0,
+ mt->physical_depth0);
+ }
+
return false;
+ }
/* There's no point in using an MCS buffer if the surface isn't in a
* renderable format.