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-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ureg.c3
-rw-r--r--src/gallium/auxiliary/util/u_inlines.h22
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c2
-rw-r--r--src/gallium/state_trackers/nine/nine_shader.c13
4 files changed, 3 insertions, 37 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 17b39e20ed8..7ed9bd6c608 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -2090,8 +2090,7 @@ ureg_create_with_screen(unsigned processor, struct pipe_screen *screen)
ureg->processor = processor;
ureg->supports_any_inout_decl_range =
screen &&
- screen->get_shader_param(screen,
- util_pipe_shader_from_tgsi_processor(processor),
+ screen->get_shader_param(screen, processor,
PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE) != 0;
ureg->next_shader_processor = -1;
diff --git a/src/gallium/auxiliary/util/u_inlines.h b/src/gallium/auxiliary/util/u_inlines.h
index eedd32e9e47..07c058abfba 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -650,28 +650,6 @@ util_max_layer(const struct pipe_resource *r, unsigned level)
}
}
-static inline unsigned
-util_pipe_shader_from_tgsi_processor(unsigned processor)
-{
- switch (processor) {
- case PIPE_SHADER_VERTEX:
- return PIPE_SHADER_VERTEX;
- case PIPE_SHADER_TESS_CTRL:
- return PIPE_SHADER_TESS_CTRL;
- case PIPE_SHADER_TESS_EVAL:
- return PIPE_SHADER_TESS_EVAL;
- case PIPE_SHADER_GEOMETRY:
- return PIPE_SHADER_GEOMETRY;
- case PIPE_SHADER_FRAGMENT:
- return PIPE_SHADER_FRAGMENT;
- case PIPE_SHADER_COMPUTE:
- return PIPE_SHADER_COMPUTE;
- default:
- assert(0);
- return PIPE_SHADER_VERTEX;
- }
-}
-
#ifdef __cplusplus
}
#endif
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 80247f7281a..52b9851e01e 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1037,7 +1037,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
sel->so = state->stream_output;
tgsi_scan_shader(state->tokens, &sel->info);
- sel->type = util_pipe_shader_from_tgsi_processor(sel->info.processor);
+ sel->type = sel->info.processor;
p_atomic_inc(&sscreen->b.num_shaders_created);
/* Set which opcode uses which (i,j) pair. */
diff --git a/src/gallium/state_trackers/nine/nine_shader.c b/src/gallium/state_trackers/nine/nine_shader.c
index dc886baba53..a539ab91f60 100644
--- a/src/gallium/state_trackers/nine/nine_shader.c
+++ b/src/gallium/state_trackers/nine/nine_shader.c
@@ -3254,17 +3254,6 @@ tx_dtor(struct shader_translator *tx)
FREE(tx);
}
-static inline unsigned
-tgsi_processor_from_type(unsigned shader_type)
-{
- switch (shader_type) {
- case PIPE_SHADER_VERTEX: return PIPE_SHADER_VERTEX;
- case PIPE_SHADER_FRAGMENT: return PIPE_SHADER_FRAGMENT;
- default:
- return ~0;
- }
-}
-
static void
shader_add_ps_fog_stage(struct shader_translator *tx, struct ureg_src src_col)
{
@@ -3326,7 +3315,7 @@ nine_translate_shader(struct NineDevice9 *device, struct nine_shader_info *info)
{
struct shader_translator *tx;
HRESULT hr = D3D_OK;
- const unsigned processor = tgsi_processor_from_type(info->type);
+ const unsigned processor = info->type;
unsigned s, slot_max;
unsigned max_const_f;