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-rw-r--r--src/intel/blorp/blorp_genX_exec.h8
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c6
2 files changed, 12 insertions, 2 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index c1fc0892893..348970a491b 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1356,8 +1356,12 @@ blorp_emit_surface_state(struct blorp_batch *batch,
surf.dim = ISL_SURF_DIM_2D;
}
- /* Blorp doesn't support HiZ in any of the blit or slow-clear paths */
- assert(!isl_aux_usage_has_hiz(surface->aux_usage));
+ if (isl_aux_usage_has_hiz(surface->aux_usage)) {
+ /* BLORP doesn't render with depth so we can't use HiZ */
+ assert(!is_render_target);
+ /* We can't reinterpret HiZ */
+ assert(surface->surf.format == surface->view.format);
+ }
enum isl_aux_usage aux_usage = surface->aux_usage;
isl_channel_mask_t write_disable_mask = 0;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 0cc7922e6e5..873c1a6c1c8 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -299,6 +299,12 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
dst_level, dst_layer, dst_x0, dst_y0, dst_x1, dst_y1,
mirror_x, mirror_y);
+ if (src_format == MESA_FORMAT_NONE)
+ src_format = src_mt->format;
+
+ if (dst_format == MESA_FORMAT_NONE)
+ dst_format = dst_mt->format;
+
if (!decode_srgb)
src_format = _mesa_get_srgb_format_linear(src_format);