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-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c25
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.h5
2 files changed, 0 insertions, 30 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 2a724ec38df..36b8a6fd33c 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -397,31 +397,6 @@ intel_batchbuffer_emit_reloc(struct brw_context *brw,
return true;
}
-bool
-intel_batchbuffer_emit_reloc_fenced(struct brw_context *brw,
- drm_intel_bo *buffer,
- uint32_t read_domains,
- uint32_t write_domain,
- uint32_t delta)
-{
- int ret;
-
- ret = drm_intel_bo_emit_reloc_fence(brw->batch.bo, 4*brw->batch.used,
- buffer, delta,
- read_domains, write_domain);
- assert(ret == 0);
- (void)ret;
-
- /*
- * Using the old buffer offset, write in what the right data would
- * be, in case the buffer doesn't move and we can short-circuit the
- * relocation processing in the kernel
- */
- intel_batchbuffer_emit_dword(brw, buffer->offset + delta);
-
- return true;
-}
-
void
intel_batchbuffer_data(struct brw_context *brw,
const void *data, GLuint bytes, enum brw_gpu_ring ring)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index 652a45b5146..eff03b3ec34 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -59,11 +59,6 @@ bool intel_batchbuffer_emit_reloc(struct brw_context *brw,
uint32_t read_domains,
uint32_t write_domain,
uint32_t offset);
-bool intel_batchbuffer_emit_reloc_fenced(struct brw_context *brw,
- drm_intel_bo *buffer,
- uint32_t read_domains,
- uint32_t write_domain,
- uint32_t offset);
void intel_batchbuffer_emit_mi_flush(struct brw_context *brw);
void intel_emit_post_sync_nonzero_flush(struct brw_context *brw);
void intel_emit_depth_stall_flushes(struct brw_context *brw);