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-rw-r--r--src/gallium/drivers/svga/include/svga_reg.h24
-rw-r--r--src/gallium/drivers/svga/svga_winsys.h1
-rw-r--r--src/gallium/winsys/svga/drm/vmw_screen_ioctl.c14
-rw-r--r--src/gallium/winsys/svga/drm/vmwgfx_drm.h1
4 files changed, 38 insertions, 2 deletions
diff --git a/src/gallium/drivers/svga/include/svga_reg.h b/src/gallium/drivers/svga/include/svga_reg.h
index 2661eef034f..bd1c6bea0b2 100644
--- a/src/gallium/drivers/svga/include/svga_reg.h
+++ b/src/gallium/drivers/svga/include/svga_reg.h
@@ -190,7 +190,9 @@ enum {
SVGA_REG_SCREENTARGET_MAX_WIDTH = 55,
SVGA_REG_SCREENTARGET_MAX_HEIGHT = 56,
SVGA_REG_MOB_MAX_SIZE = 57,
- SVGA_REG_TOP = 58, /* Must be 1 more than the last register */
+ SVGA_REG_BLANK_SCREEN_TARGETS = 58,
+ SVGA_REG_CAP2 = 59,
+ SVGA_REG_TOP = 60, /* Must be 1 more than the last register */
SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */
/* Next 768 (== 256*3) registers exist for colormap */
@@ -646,10 +648,28 @@ struct {
#define SVGA_CAP_GBOBJECTS 0x08000000
#define SVGA_CAP_CMD_BUFFERS_3 0x10000000
-#define SVGA_CAP_CMD_RESERVED 0x80000000
+#define SVGA_CAP_CAP2_REGISTER 0x80000000
/*
+ * The SVGA_REG_CAP2 register is an additional set of SVGA capability bits.
+ *
+ * SVGA_CAP2_GROW_OTABLE --
+ * Allow the GrowOTable/DXGrowCOTable commands.
+ *
+ * SVGA_CAP2_INTRA_SURFACE_COPY --
+ * Allow the IntraSurfaceCopy command.
+ *
+ * SVGA_CAP2_RESERVED --
+ * Reserve the last bit for extending the SVGA capabilities to some
+ * future mechanisms.
+ */
+#define SVGA_CAP2_NONE 0x00000000
+#define SVGA_CAP2_GROW_OTABLE 0x00000001
+#define SVGA_CAP2_INTRA_SURFACE_COPY 0x00000002
+#define SVGA_CAP2_RESERVED 0x80000000
+
+/*
* The Guest can optionally read some SVGA device capabilities through
* the backdoor with command BDOOR_CMD_GET_SVGA_CAPABILITIES before
* the SVGA device is initialized. The type of capability the guest
diff --git a/src/gallium/drivers/svga/svga_winsys.h b/src/gallium/drivers/svga/svga_winsys.h
index afa8f5657ae..a4c4d6a8858 100644
--- a/src/gallium/drivers/svga/svga_winsys.h
+++ b/src/gallium/drivers/svga/svga_winsys.h
@@ -763,6 +763,7 @@ struct svga_winsys_screen
boolean have_set_predication_cmd;
boolean have_transfer_from_buffer_cmd;
boolean have_fence_fd;
+ boolean have_intra_surface_copy;
};
diff --git a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
index 16dd5c8593a..f759f765e8b 100644
--- a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
+++ b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
@@ -928,6 +928,20 @@ vmw_ioctl_init(struct vmw_winsys_screen *vws)
if (vws->base.have_gb_objects && !drm_gb_capable)
goto out_no_3d;
+ memset(&gp_arg, 0, sizeof(gp_arg));
+ gp_arg.param = DRM_VMW_PARAM_HW_CAPS2;
+ ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM,
+ &gp_arg, sizeof(gp_arg));
+ if (ret)
+ vws->base.have_intra_surface_copy = FALSE;
+ else {
+ if (gp_arg.value & (uint64_t) SVGA_CAP2_INTRA_SURFACE_COPY)
+ vws->base.have_intra_surface_copy = TRUE;
+ else
+ vws->base.have_intra_surface_copy = FALSE;
+ }
+
+
vws->base.have_vgpu10 = FALSE;
if (vws->base.have_gb_objects) {
memset(&gp_arg, 0, sizeof(gp_arg));
diff --git a/src/gallium/winsys/svga/drm/vmwgfx_drm.h b/src/gallium/winsys/svga/drm/vmwgfx_drm.h
index 13d779494fb..21696d02f2f 100644
--- a/src/gallium/winsys/svga/drm/vmwgfx_drm.h
+++ b/src/gallium/winsys/svga/drm/vmwgfx_drm.h
@@ -91,6 +91,7 @@
#define DRM_VMW_PARAM_MAX_MOB_SIZE 10
#define DRM_VMW_PARAM_SCREEN_TARGET 11
#define DRM_VMW_PARAM_VGPU10 12
+#define DRM_VMW_PARAM_HW_CAPS2 13
/**
* enum drm_vmw_handle_type - handle type for ref ioctls