diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 25 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 |
2 files changed, 21 insertions, 5 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 2604296d46e..3c3d61112b9 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -2695,13 +2695,30 @@ NVC0LoweringPass::visit(Instruction *i) /* Kepler+ has a special opcode to compute a new base address to be used * for indirect loads. + * + * Maxwell+ has an additional similar requirement for indirect + * interpolation ops in frag shaders. */ - if (targ->getChipset() >= NVISA_GK104_CHIPSET && !i->perPatch && - (i->op == OP_VFETCH || i->op == OP_EXPORT) && i->src(0).isIndirect(0)) { + bool doAfetch = false; + if (targ->getChipset() >= NVISA_GK104_CHIPSET && + !i->perPatch && + (i->op == OP_VFETCH || i->op == OP_EXPORT) && + i->src(0).isIndirect(0)) { + doAfetch = true; + } + if (targ->getChipset() >= NVISA_GM107_CHIPSET && + (i->op == OP_LINTERP || i->op == OP_PINTERP) && + i->src(0).isIndirect(0)) { + doAfetch = true; + } + + if (doAfetch) { + Value *addr = cloneShallow(func, i->getSrc(0)); Instruction *afetch = bld.mkOp1(OP_AFETCH, TYPE_U32, bld.getSSA(), - cloneShallow(func, i->getSrc(0))); + i->getSrc(0)); afetch->setIndirect(0, 0, i->getIndirect(0, 0)); - i->src(0).get()->reg.data.offset = 0; + addr->reg.data.offset = 0; + i->setSrc(0, addr); i->setIndirect(0, 0, afetch->getDef(0)); } diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 0103031da66..1757cbb93a5 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -349,7 +349,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: return shader != PIPE_SHADER_FRAGMENT; case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: - return shader != PIPE_SHADER_FRAGMENT || class_3d < GM107_3D_CLASS; case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: return 1; |