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-rw-r--r--src/mesa/drivers/dri/i965/Makefile1
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h11
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_disable.c126
5 files changed, 141 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 63d826f3d6b..0c6313a82a9 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -99,6 +99,7 @@ DRIVER_SOURCES = \
gen6_wm_state.c \
gen7_cc_state.c \
gen7_clip_state.c \
+ gen7_disable.c \
gen7_sf_state.c \
gen7_urb.c \
gen7_viewport_state.c \
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index f784456e957..3e35e54d35a 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -930,6 +930,7 @@
# define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
/* DW4 */
# define GEN6_GS_URB_READ_LENGTH_SHIFT 11
+# define GEN7_GS_INCLUDE_VERTEX_HANDLES (1 << 10)
# define GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT 4
# define GEN6_GS_DISPATCH_START_GRF_SHIFT 0
/* DW5 */
@@ -937,9 +938,14 @@
# define GEN6_GS_STATISTICS_ENABLE (1 << 10)
# define GEN6_GS_SO_STATISTICS_ENABLE (1 << 9)
# define GEN6_GS_RENDERING_ENABLE (1 << 8)
+# define GEN7_GS_ENABLE (1 << 0)
/* DW6 */
# define GEN6_GS_ENABLE (1 << 15)
+#define _3DSTATE_HS 0x781B /* GEN7+ */
+#define _3DSTATE_TE 0x781C /* GEN7+ */
+#define _3DSTATE_DS 0x781D /* GEN7+ */
+
#define _3DSTATE_CLIP 0x7812 /* GEN6+ */
/* DW1 */
# define GEN7_CLIP_WINDING_CW (0 << 20)
@@ -1148,6 +1154,9 @@
# define GEN6_CONSTANT_BUFFER_1_ENABLE (1 << 13)
# define GEN6_CONSTANT_BUFFER_0_ENABLE (1 << 12)
+#define _3DSTATE_CONSTANT_HS 0x7819 /* GEN7+ */
+#define _3DSTATE_CONSTANT_DS 0x781A /* GEN7+ */
+
/* 3DSTATE_WM for Gen7 */
/* DW1 */
# define GEN7_WM_STATISTICS_ENABLE (1 << 31)
@@ -1219,6 +1228,8 @@
/* DW6: kernel 1 pointer */
/* DW7: kernel 2 pointer */
+#define _3DSTATE_STREAMOUT 0x781e /* GEN7+ */
+
#define _3DSTATE_SAMPLE_MASK 0x7818 /* GEN6+ */
#define _3DSTATE_DRAWING_RECTANGLE 0x7900
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 0cfcc044a0d..115e8ce17a8 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -116,11 +116,13 @@ extern const struct brw_tracked_state gen7_cc_state_pointer;
extern const struct brw_tracked_state gen7_cc_viewport_state_pointer;
extern const struct brw_tracked_state gen7_clip_state;
extern const struct brw_tracked_state gen7_depth_stencil_state_pointer;
+extern const struct brw_tracked_state gen7_disable_stages;
extern const struct brw_tracked_state gen7_ps_state;
extern const struct brw_tracked_state gen7_sbe_state;
extern const struct brw_tracked_state gen7_sf_clip_viewport;
extern const struct brw_tracked_state gen7_sf_clip_viewport_state_pointer;
extern const struct brw_tracked_state gen7_sf_state;
+extern const struct brw_tracked_state gen7_sol_state;
extern const struct brw_tracked_state gen7_urb;
extern const struct brw_tracked_state gen7_vs_state;
extern const struct brw_tracked_state gen7_wm_constants;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index a3a52327483..062d98e4195 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -210,8 +210,8 @@ const struct brw_tracked_state *gen7_atoms[] =
&brw_wm_samplers,
&gen6_sampler_state,
+ &gen7_disable_stages,
&gen7_vs_state,
- &gen6_gs_state,
&gen7_clip_state,
&gen7_sbe_state,
&gen7_sf_state,
diff --git a/src/mesa/drivers/dri/i965/gen7_disable.c b/src/mesa/drivers/dri/i965/gen7_disable.c
new file mode 100644
index 00000000000..4fbbfe72e3b
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen7_disable.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright © 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "brw_defines.h"
+#include "intel_batchbuffer.h"
+
+static void
+disable_stages(struct brw_context *brw)
+{
+ struct intel_context *intel = &brw->intel;
+
+ assert(brw->gs.prog_bo == NULL);
+
+ /* Disable the Geometry Shader (GS) Unit */
+ BEGIN_BATCH(7);
+ OUT_BATCH(_3DSTATE_CONSTANT_GS << 16 | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(7);
+ OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
+ OUT_BATCH(0); /* prog_bo */
+ OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
+ (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
+ OUT_BATCH(0); /* scratch space base offset */
+ OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
+ (0 << GEN6_GS_URB_READ_LENGTH_SHIFT) |
+ GEN7_GS_INCLUDE_VERTEX_HANDLES |
+ (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT));
+ OUT_BATCH((0 << GEN6_GS_MAX_THREADS_SHIFT) |
+ GEN6_GS_STATISTICS_ENABLE);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ /* Disable the HS Unit */
+ BEGIN_BATCH(7);
+ OUT_BATCH(_3DSTATE_CONSTANT_HS << 16 | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(7);
+ OUT_BATCH(_3DSTATE_HS << 16 | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ /* Disable the TE */
+ BEGIN_BATCH(4);
+ OUT_BATCH(_3DSTATE_TE << 16 | (4 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ /* Disable the DS Unit */
+ BEGIN_BATCH(7);
+ OUT_BATCH(_3DSTATE_CONSTANT_DS << 16 | (7 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(6);
+ OUT_BATCH(_3DSTATE_DS << 16 | (6 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ /* Disable the SOL stage */
+ BEGIN_BATCH(3);
+ OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state gen7_disable_stages = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH,
+ .cache = 0,
+ },
+ .emit = disable_stages,
+};
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 10:36:05 +0000