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-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_iz.c3
4 files changed, 1 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b6f77710903..5d94181d64d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2049,7 +2049,7 @@ fs_visitor::emit_fb_writes()
fail("Missing support for simd16 depth writes on gen6\n");
}
- if (c->computes_depth) {
+ if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
/* Hand over gl_FragDepth. */
assert(this->frag_depth.file != BAD_FILE);
emit(MOV(fs_reg(MRF, nr), this->frag_depth));
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index e2d16db51ac..9b2c58c3aa3 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -160,7 +160,6 @@ brw_wm_payload_setup(struct brw_context *brw,
if (c->fp->program.Base.OutputsWritten &
BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
c->source_depth_to_render_target = true;
- c->computes_depth = true;
}
} else {
brw_wm_lookup_iz(intel, c);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 46d4416ba8f..c017866c421 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -89,7 +89,6 @@ struct brw_wm_compile {
uint8_t dest_depth_reg;
uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
uint8_t nr_payload_regs;
- GLuint computes_depth:1; /* could be derived from program string */
GLuint source_depth_to_render_target:1;
GLuint runtime_check_aads_emit:1;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.c b/src/mesa/drivers/dri/i965/brw_wm_iz.c
index 878f5d079de..147753ab424 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_iz.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_iz.c
@@ -142,9 +142,6 @@ void brw_wm_lookup_iz(struct intel_context *intel,
kill_stats_promoted_workaround = true;
}
- if (lookup & IZ_PS_COMPUTES_DEPTH_BIT)
- c->computes_depth = 1;
-
if (wm_iz_table[lookup].sd_present || uses_depth ||
kill_stats_promoted_workaround) {
c->source_depth_reg = reg;