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-rw-r--r--src/mesa/drivers/dri/i965/brw_clear.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index d94e2597662..1cac996482d 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -181,8 +181,16 @@ brw_fast_clear_depth(struct gl_context *ctx)
*/
intel_batchbuffer_emit_mi_flush(brw);
- intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
- GEN6_HIZ_OP_DEPTH_CLEAR);
+ if (fb->NumLayers > 0) {
+ assert(fb->NumLayers == depth_irb->mt->level[depth_irb->mt_level].depth);
+ for (unsigned layer = 0; layer < fb->NumLayers; layer++) {
+ intel_hiz_exec(brw, mt, depth_irb->mt_level, layer,
+ GEN6_HIZ_OP_DEPTH_CLEAR);
+ }
+ } else {
+ intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
+ GEN6_HIZ_OP_DEPTH_CLEAR);
+ }
if (brw->gen == 6) {
/* From the Sandy Bridge PRM, volume 2 part 1, page 314: