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-rw-r--r--src/mesa/drivers/dri/r128/server/r128_dri.c22
-rw-r--r--src/mesa/drivers/dri/radeon/server/radeon_dri.c18
2 files changed, 12 insertions, 28 deletions
diff --git a/src/mesa/drivers/dri/r128/server/r128_dri.c b/src/mesa/drivers/dri/r128/server/r128_dri.c
index 1df8876fafd..61587617a63 100644
--- a/src/mesa/drivers/dri/r128/server/r128_dri.c
+++ b/src/mesa/drivers/dri/r128/server/r128_dri.c
@@ -55,16 +55,7 @@
#include "r128_version.h"
#include "r128_drm.h"
-
-/* ?? HACK - for now, put this here... */
-/* ?? Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
-#if defined(__alpha__)
-# define DRM_PAGE_SIZE 8192
-#elif defined(__ia64__)
-# define DRM_PAGE_SIZE getpagesize()
-#else
-# define DRM_PAGE_SIZE 4096
-#endif
+static size_t r128_drm_page_size;
/* Compute log base 2 of val. */
static int R128MinBits(int val)
@@ -144,11 +135,11 @@ static GLboolean R128DRIAgpInit(const DRIDriverContext *ctx)
/* Initialize the CCE ring buffer data */
info->ringStart = info->agpOffset;
- info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE;
+ info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size;
info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1;
info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = DRM_PAGE_SIZE;
+ info->ringReadMapSize = r128_drm_page_size;
/* Reserve space for vertex/indirect buffers */
info->bufStart = info->ringReadOffset + info->ringReadMapSize;
@@ -298,11 +289,11 @@ static GLboolean R128DRIPciInit(const DRIDriverContext *ctx)
/* Initialize the CCE ring buffer data */
info->ringStart = info->agpOffset;
- info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE;
+ info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size;
info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1;
info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = DRM_PAGE_SIZE;
+ info->ringReadMapSize = r128_drm_page_size;
/* Reserve space for vertex/indirect buffers */
info->bufStart = info->ringReadOffset + info->ringReadMapSize;
@@ -702,7 +693,8 @@ static GLboolean R128DRIScreenInit(DRIDriverContext *ctx)
case 32:
break;
}
-
+ r128_drm_page_size = getpagesize();
+
info->registerSize = ctx->MMIOSize;
ctx->shared.SAREASize = SAREA_MAX;
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.c b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
index 5884624e22f..df4d4bb81bb 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_dri.c
+++ b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
@@ -23,17 +23,7 @@
#include "radeon_reg.h"
#include "drm_sarea.h"
-
-/* HACK - for now, put this here... */
-/* Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
-#if defined(__alpha__)
-# define DRM_PAGE_SIZE 8192
-#elif defined(__ia64__)
-# define DRM_PAGE_SIZE getpagesize()
-#else
-# define DRM_PAGE_SIZE 4096
-#endif
-
+static size_t radeon_drm_page_size;
/**
* \brief Wait for free FIFO entries.
@@ -368,10 +358,10 @@ static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
/* Initialize the CP ring buffer data */
info->ringStart = info->gartOffset;
- info->ringMapSize = info->ringSize*1024*1024 + DRM_PAGE_SIZE;
+ info->ringMapSize = info->ringSize*1024*1024 + radeon_drm_page_size;
info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = DRM_PAGE_SIZE;
+ info->ringReadMapSize = radeon_drm_page_size;
/* Reserve space for vertex/indirect buffers */
info->bufStart = info->ringReadOffset + info->ringReadMapSize;
@@ -765,6 +755,8 @@ static int RADEONScreenInit( DRIDriverContext *ctx, RADEONInfoPtr info )
"Radeon 9700 and newer cards\n");
return 0;
}
+
+ radeon_drm_page_size = getpagesize();
info->registerSize = ctx->MMIOSize;
ctx->shared.SAREASize = SAREA_MAX;