diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 10 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 7 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_dump.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 7 |
4 files changed, 28 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 4db3a3225f1..e22f21d6c55 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -166,6 +166,8 @@ enum brw_cache_id { BRW_CACHE_VS_PROG, BRW_CACHE_FF_GS_PROG, BRW_CACHE_GS_PROG, + BRW_CACHE_TCS_PROG, + BRW_CACHE_TES_PROG, BRW_CACHE_CLIP_PROG, BRW_CACHE_CS_PROG, @@ -177,9 +179,12 @@ enum brw_state_id { BRW_STATE_URB_FENCE = BRW_MAX_CACHE, BRW_STATE_FRAGMENT_PROGRAM, BRW_STATE_GEOMETRY_PROGRAM, + BRW_STATE_TESS_CTRL_PROGRAM, + BRW_STATE_TESS_EVAL_PROGRAM, BRW_STATE_VERTEX_PROGRAM, BRW_STATE_CURBE_OFFSETS, BRW_STATE_REDUCED_PRIMITIVE, + BRW_STATE_PATCH_PRIMITIVE, BRW_STATE_PRIMITIVE, BRW_STATE_CONTEXT, BRW_STATE_PSP, @@ -247,14 +252,19 @@ enum brw_state_id { #define BRW_NEW_VS_PROG_DATA (1ull << BRW_CACHE_VS_PROG) #define BRW_NEW_FF_GS_PROG_DATA (1ull << BRW_CACHE_FF_GS_PROG) #define BRW_NEW_GS_PROG_DATA (1ull << BRW_CACHE_GS_PROG) +#define BRW_NEW_TCS_PROG_DATA (1ull << BRW_CACHE_TCS_PROG) +#define BRW_NEW_TES_PROG_DATA (1ull << BRW_CACHE_TES_PROG) #define BRW_NEW_CLIP_PROG_DATA (1ull << BRW_CACHE_CLIP_PROG) #define BRW_NEW_CS_PROG_DATA (1ull << BRW_CACHE_CS_PROG) #define BRW_NEW_URB_FENCE (1ull << BRW_STATE_URB_FENCE) #define BRW_NEW_FRAGMENT_PROGRAM (1ull << BRW_STATE_FRAGMENT_PROGRAM) #define BRW_NEW_GEOMETRY_PROGRAM (1ull << BRW_STATE_GEOMETRY_PROGRAM) +#define BRW_NEW_TESS_EVAL_PROGRAM (1ull << BRW_STATE_TESS_EVAL_PROGRAM) +#define BRW_NEW_TESS_CTRL_PROGRAM (1ull << BRW_STATE_TESS_CTRL_PROGRAM) #define BRW_NEW_VERTEX_PROGRAM (1ull << BRW_STATE_VERTEX_PROGRAM) #define BRW_NEW_CURBE_OFFSETS (1ull << BRW_STATE_CURBE_OFFSETS) #define BRW_NEW_REDUCED_PRIMITIVE (1ull << BRW_STATE_REDUCED_PRIMITIVE) +#define BRW_NEW_PATCH_PRIMITIVE (1ull << BRW_STATE_PATCH_PRIMITIVE) #define BRW_NEW_PRIMITIVE (1ull << BRW_STATE_PRIMITIVE) #define BRW_NEW_CONTEXT (1ull << BRW_STATE_CONTEXT) #define BRW_NEW_PSP (1ull << BRW_STATE_PSP) diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index c08272f572d..8398471d221 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -144,14 +144,17 @@ gen6_set_prim(struct brw_context *brw, const struct _mesa_prim *prim) DBG("PRIM: %s\n", _mesa_enum_to_string(prim->mode)); - if (prim->mode == GL_PATCHES) + if (prim->mode == GL_PATCHES) { hw_prim = _3DPRIM_PATCHLIST(ctx->TessCtrlProgram.patch_vertices); - else + } else { hw_prim = get_hw_prim_for_gl_prim(prim->mode); + } if (hw_prim != brw->primitive) { brw->primitive = hw_prim; brw->ctx.NewDriverState |= BRW_NEW_PRIMITIVE; + if (prim->mode == GL_PATCHES) + brw->ctx.NewDriverState |= BRW_NEW_PATCH_PRIMITIVE; } } diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c index 0c974c4c807..3d3a6cf943a 100644 --- a/src/mesa/drivers/dri/i965/brw_state_dump.c +++ b/src/mesa/drivers/dri/i965/brw_state_dump.c @@ -729,6 +729,12 @@ dump_prog_cache(struct brw_context *brw) case BRW_CACHE_VS_PROG: name = "VS kernel"; break; + case BRW_CACHE_TCS_PROG: + name = "TCS kernel"; + break; + case BRW_CACHE_TES_PROG: + name = "TES kernel"; + break; case BRW_CACHE_FF_GS_PROG: name = "Fixed-function GS kernel"; break; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index a724c8b7652..0a842bb7dcd 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -582,14 +582,19 @@ static struct dirty_bit_map brw_bits[] = { DEFINE_BIT(BRW_NEW_VS_PROG_DATA), DEFINE_BIT(BRW_NEW_FF_GS_PROG_DATA), DEFINE_BIT(BRW_NEW_GS_PROG_DATA), + DEFINE_BIT(BRW_NEW_TCS_PROG_DATA), + DEFINE_BIT(BRW_NEW_TES_PROG_DATA), DEFINE_BIT(BRW_NEW_CLIP_PROG_DATA), DEFINE_BIT(BRW_NEW_CS_PROG_DATA), DEFINE_BIT(BRW_NEW_URB_FENCE), DEFINE_BIT(BRW_NEW_FRAGMENT_PROGRAM), DEFINE_BIT(BRW_NEW_GEOMETRY_PROGRAM), + DEFINE_BIT(BRW_NEW_TESS_EVAL_PROGRAM), + DEFINE_BIT(BRW_NEW_TESS_CTRL_PROGRAM), DEFINE_BIT(BRW_NEW_VERTEX_PROGRAM), DEFINE_BIT(BRW_NEW_CURBE_OFFSETS), DEFINE_BIT(BRW_NEW_REDUCED_PRIMITIVE), + DEFINE_BIT(BRW_NEW_PATCH_PRIMITIVE), DEFINE_BIT(BRW_NEW_PRIMITIVE), DEFINE_BIT(BRW_NEW_CONTEXT), DEFINE_BIT(BRW_NEW_PSP), @@ -724,10 +729,12 @@ brw_upload_pipeline_state(struct brw_context *brw, if (brw->tess_eval_program != ctx->TessEvalProgram._Current) { brw->tess_eval_program = ctx->TessEvalProgram._Current; + brw->ctx.NewDriverState |= BRW_NEW_TESS_EVAL_PROGRAM; } if (brw->tess_ctrl_program != ctx->TessCtrlProgram._Current) { brw->tess_ctrl_program = ctx->TessCtrlProgram._Current; + brw->ctx.NewDriverState |= BRW_NEW_TESS_CTRL_PROGRAM; } if (brw->geometry_program != ctx->GeometryProgram._Current) { |