diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/common/ac_gpu_info.c | 2 | ||||
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_get.c | 16 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 |
4 files changed, 11 insertions, 13 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 4eeb6042eef..5a395772460 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -327,6 +327,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, /* DRM 3.1.0 doesn't flush TC for VI correctly. */ info->kernel_flushes_tc_l2_after_ib = info->chip_class != VI || info->drm_minor >= 2; + info->has_indirect_compute_dispatch = true; info->num_render_backends = amdinfo->rb_pipes; /* The value returned by the kernel driver was wrong. */ @@ -483,6 +484,7 @@ void ac_print_gpu_info(struct radeon_info *info) printf(" has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator); printf(" has_format_bc1_through_bc7 = %u\n", info->has_format_bc1_through_bc7); printf(" kernel_flushes_tc_l2_after_ib = %u\n", info->kernel_flushes_tc_l2_after_ib); + printf(" has_indirect_compute_dispatch = %u\n", info->has_indirect_compute_dispatch); printf("Shader core info:\n"); printf(" max_shader_clock = %i\n", info->max_shader_clock); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 5e404714db6..d5d10c60102 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -105,6 +105,7 @@ struct radeon_info { bool has_eqaa_surface_allocator; bool has_format_bc1_through_bc7; bool kernel_flushes_tc_l2_after_ib; + bool has_indirect_compute_dispatch; /* Shader cores. */ uint32_t r600_max_quad_pipes; /* wave size / 16 */ diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index cd3e63c73d7..0e7d28e334c 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -83,16 +83,6 @@ const char *si_get_family_name(const struct si_screen *sscreen) } } -static bool si_have_tgsi_compute(struct si_screen *sscreen) -{ - /* Old kernels disallowed some register writes for SI - * that are used for indirect dispatches. */ - return (sscreen->info.chip_class >= CIK || - sscreen->info.drm_major == 3 || - (sscreen->info.drm_major == 2 && - sscreen->info.drm_minor >= 45)); -} - static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) { struct si_screen *sscreen = (struct si_screen *)pscreen; @@ -225,7 +215,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 4; case PIPE_CAP_GLSL_FEATURE_LEVEL: - if (si_have_tgsi_compute(sscreen)) + if (sscreen->info.has_indirect_compute_dispatch) return 450; return 420; @@ -294,7 +284,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return sscreen->info.has_fence_to_handle; case PIPE_CAP_QUERY_BUFFER_OBJECT: - return si_have_tgsi_compute(sscreen); + return sscreen->info.has_indirect_compute_dispatch; case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_MULTI_DRAW_INDIRECT: @@ -408,7 +398,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, case PIPE_SHADER_CAP_SUPPORTED_IRS: { int ir = 1 << PIPE_SHADER_IR_NATIVE; - if (si_have_tgsi_compute(sscreen)) + if (sscreen->info.has_indirect_compute_dispatch) ir |= 1 << PIPE_SHADER_IR_TGSI; return ir; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 1b029e94969..129d4f46f5b 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -539,6 +539,11 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) ws->info.has_eqaa_surface_allocator = false; ws->info.has_format_bc1_through_bc7 = ws->info.drm_minor >= 31; ws->info.kernel_flushes_tc_l2_after_ib = true; + /* Old kernels disallowed register writes via COPY_DATA + * that are used for indirect compute dispatches. */ + ws->info.has_indirect_compute_dispatch = ws->info.chip_class == CIK || + (ws->info.chip_class == SI && + ws->info.drm_minor >= 45); ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; |