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-rw-r--r--src/gallium/drivers/v3d/v3d_job.c4
-rw-r--r--src/gallium/drivers/v3d/v3d_screen.c27
-rw-r--r--src/gallium/drivers/v3d/v3d_screen.h1
-rw-r--r--src/gallium/drivers/v3d/v3dx_rcl.c15
-rw-r--r--src/gallium/drivers/v3d/v3dx_simulator.c3
5 files changed, 28 insertions, 22 deletions
diff --git a/src/gallium/drivers/v3d/v3d_job.c b/src/gallium/drivers/v3d/v3d_job.c
index 70176045545..0acd8b033c2 100644
--- a/src/gallium/drivers/v3d/v3d_job.c
+++ b/src/gallium/drivers/v3d/v3d_job.c
@@ -497,6 +497,10 @@ v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job)
job->submit.bcl_end = job->bcl.bo->offset + cl_offset(&job->bcl);
job->submit.rcl_end = job->rcl.bo->offset + cl_offset(&job->rcl);
+ job->submit.flags = 0;
+ if (job->tmu_dirty_rcl && screen->has_cache_flush)
+ job->submit.flags |= DRM_V3D_SUBMIT_CL_FLUSH_CACHE;
+
/* On V3D 4.1, the tile alloc/state setup moved to register writes
* instead of binner packets.
*/
diff --git a/src/gallium/drivers/v3d/v3d_screen.c b/src/gallium/drivers/v3d/v3d_screen.c
index 957420a5311..2d63a43e2dd 100644
--- a/src/gallium/drivers/v3d/v3d_screen.c
+++ b/src/gallium/drivers/v3d/v3d_screen.c
@@ -175,7 +175,10 @@ v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return 4;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
- return 4;
+ if (screen->has_cache_flush)
+ return 4;
+ else
+ return 0; /* Disables shader storage */
case PIPE_CAP_GLSL_FEATURE_LEVEL:
return 330;
@@ -356,16 +359,24 @@ v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return V3D_MAX_TEXTURE_SAMPLERS;
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
- if (shader == PIPE_SHADER_VERTEX)
- return 0;
+ if (screen->has_cache_flush) {
+ if (shader == PIPE_SHADER_VERTEX)
+ return 0;
- return PIPE_MAX_SHADER_BUFFERS;
+ return PIPE_MAX_SHADER_BUFFERS;
+ } else {
+ return 0;
+ }
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
- if (screen->devinfo.ver < 41)
+ if (screen->has_cache_flush) {
+ if (screen->devinfo.ver < 41)
+ return 0;
+ else
+ return PIPE_MAX_SHADER_IMAGES;
+ } else {
return 0;
- else
- return PIPE_MAX_SHADER_IMAGES;
+ }
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_NIR;
@@ -670,6 +681,8 @@ v3d_screen_create(int fd, const struct pipe_screen_config *config,
slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
screen->has_csd = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CSD);
+ screen->has_cache_flush =
+ v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH);
v3d_fence_init(screen);
diff --git a/src/gallium/drivers/v3d/v3d_screen.h b/src/gallium/drivers/v3d/v3d_screen.h
index 2f276ac9b0d..db2138d20be 100644
--- a/src/gallium/drivers/v3d/v3d_screen.h
+++ b/src/gallium/drivers/v3d/v3d_screen.h
@@ -78,6 +78,7 @@ struct v3d_screen {
uint32_t bo_count;
bool has_csd;
+ bool has_cache_flush;
bool nonmsaa_texture_size_limit;
struct v3d_simulator_file *sim_file;
diff --git a/src/gallium/drivers/v3d/v3dx_rcl.c b/src/gallium/drivers/v3d/v3dx_rcl.c
index e3ead90787f..0434fe84836 100644
--- a/src/gallium/drivers/v3d/v3dx_rcl.c
+++ b/src/gallium/drivers/v3d/v3dx_rcl.c
@@ -795,20 +795,5 @@ v3dX(emit_rcl)(struct v3d_job *job)
}
}
- if (job->tmu_dirty_rcl) {
- cl_emit(&job->rcl, L1_CACHE_FLUSH_CONTROL, flush) {
- flush.tmu_config_cache_clear = 0xf;
- flush.tmu_data_cache_clear = 0xf;
- flush.uniforms_cache_clear = 0xf;
- flush.instruction_cache_clear = 0xf;
- }
-
- cl_emit(&job->rcl, L2T_CACHE_FLUSH_CONTROL, flush) {
- flush.l2t_flush_mode = L2T_FLUSH_MODE_CLEAN;
- flush.l2t_flush_start = cl_address(NULL, 0);
- flush.l2t_flush_end = cl_address(NULL, ~0);
- }
- }
-
cl_emit(&job->rcl, END_OF_RENDERING, end);
}
diff --git a/src/gallium/drivers/v3d/v3dx_simulator.c b/src/gallium/drivers/v3d/v3dx_simulator.c
index 87bd2fd0e20..a9d3d8cd780 100644
--- a/src/gallium/drivers/v3d/v3dx_simulator.c
+++ b/src/gallium/drivers/v3d/v3dx_simulator.c
@@ -225,6 +225,9 @@ v3dX(simulator_get_param_ioctl)(struct v3d_hw *v3d,
case DRM_V3D_PARAM_SUPPORTS_CSD:
args->value = V3D_VERSION >= 41;
return 0;
+ case DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH:
+ args->value = 1;
+ return 0;
}
if (args->param < ARRAY_SIZE(reg_map) && reg_map[args->param]) {