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-rw-r--r--src/mesa/drivers/dri/r600/r600_context.c202
1 files changed, 100 insertions, 102 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c
index ba0d450cbb2..9776a868ff3 100644
--- a/src/mesa/drivers/dri/r600/r600_context.c
+++ b/src/mesa/drivers/dri/r600/r600_context.c
@@ -213,6 +213,96 @@ static void r600_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.fallback = r600_fallback;
}
+static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
+{
+ context_t *r600 = R700_CONTEXT(ctx);
+
+ ctx->Const.MaxTextureImageUnits =
+ driQueryOptioni(&r600->radeon.optionCache, "texture_image_units");
+ ctx->Const.MaxTextureCoordUnits =
+ driQueryOptioni(&r600->radeon.optionCache, "texture_coord_units");
+ ctx->Const.MaxTextureUnits =
+ MIN2(ctx->Const.MaxTextureImageUnits,
+ ctx->Const.MaxTextureCoordUnits);
+ ctx->Const.MaxTextureMaxAnisotropy = 16.0;
+ ctx->Const.MaxTextureLodBias = 16.0;
+
+ ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
+ ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
+
+ ctx->Const.MinPointSize = 0x0001 / 8.0;
+ ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
+ ctx->Const.MaxPointSize = 0xffff / 8.0;
+ ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
+
+ ctx->Const.MinLineWidth = 0x0001 / 8.0;
+ ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
+ ctx->Const.MaxLineWidth = 0xffff / 8.0;
+ ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
+
+ ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
+
+ /* 256 for reg-based consts, inline consts also supported */
+ ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
+ ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
+ ctx->Const.VertexProgram.MaxNativeAttribs = 160;
+ ctx->Const.VertexProgram.MaxTemps = 128;
+ ctx->Const.VertexProgram.MaxNativeTemps = 128;
+ ctx->Const.VertexProgram.MaxNativeParameters = 256;
+ ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
+
+ ctx->Const.FragmentProgram.MaxNativeTemps = 128;
+ ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
+ ctx->Const.FragmentProgram.MaxNativeParameters = 256;
+ ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
+ /* 8 per clause on r6xx, 16 on rv670/r7xx */
+ if ((screen->chip_family == CHIP_FAMILY_RV670) ||
+ (screen->chip_family >= CHIP_FAMILY_RV770))
+ ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
+ else
+ ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
+ ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
+ ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
+ ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
+}
+
+static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
+{
+ /* Parse configuration files.
+ * Do this here so that initialMaxAnisotropy is set before we create
+ * the default textures.
+ */
+ driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
+ screen->driScreen->myNum, "r600");
+
+ r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
+ "def_max_anisotropy");
+
+}
+
+static void r600InitGLExtensions(GLcontext *ctx)
+{
+ context_t *r600 = R700_CONTEXT(ctx);
+
+ driInitExtensions(ctx, card_extensions, GL_TRUE);
+ if (r600->radeon.radeonScreen->kernel_mm)
+ driInitExtensions(ctx, mm_extensions, GL_FALSE);
+
+ if (driQueryOptionb
+ (&r600->radeon.optionCache, "disable_stencil_two_side"))
+ _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
+
+ if (r600->radeon.glCtx->Mesa_DXTn
+ && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
+ _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+ _mesa_enable_extension(ctx, "GL_S3_s3tc");
+ } else
+ if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
+ {
+ _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+ }
+}
+
/* Create the device specific rendering context.
*/
GLboolean r600CreateContext(const __GLcontextModes * glVisual,
@@ -236,19 +326,10 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
return GL_FALSE;
}
- if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
- hw_tcl_on = future_hw_tcl_on = 0;
+ r600ParseOptions(r600, screen);
+ r600->radeon.radeonScreen = screen;
r600_init_vtbl(&r600->radeon);
- /* Parse configuration files.
- * Do this here so that initialMaxAnisotropy is set before we create
- * the default textures.
- */
- driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
- screen->driScreen->myNum, "r600");
-
- r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
- "def_max_anisotropy");
/* Init default driver functions then plug in our R600-specific functions
* (the texture functions are especially important)
@@ -259,7 +340,7 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
r600InitTextureFuncs(&functions);
r700InitShaderFuncs(&functions);
r700InitIoctlFuncs(&functions);
- radeonInitBufferObjectFuncs(&functions);
+ radeonInitBufferObjectFuncs(&functions);
if (!radeonInitContext(&r600->radeon, &functions,
glVisual, driContextPriv,
@@ -269,44 +350,14 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
return GL_FALSE;
}
- /* Init r600 context data */
- /* Set the maximum texture size small enough that we can guarentee that
- * all texture units can bind a maximal texture and have them both in
- * texturable memory at once.
- */
-
ctx = r600->radeon.glCtx;
- ctx->Const.MaxTextureImageUnits =
- driQueryOptioni(&r600->radeon.optionCache, "texture_image_units");
- ctx->Const.MaxTextureCoordUnits =
- driQueryOptioni(&r600->radeon.optionCache, "texture_coord_units");
- ctx->Const.MaxTextureUnits =
- MIN2(ctx->Const.MaxTextureImageUnits,
- ctx->Const.MaxTextureCoordUnits);
- ctx->Const.MaxTextureMaxAnisotropy = 16.0;
- ctx->Const.MaxTextureLodBias = 16.0;
-
- ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
- ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
-
- ctx->Const.MinPointSize = 0x0001 / 8.0;
- ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
- ctx->Const.MaxPointSize = 0xffff / 8.0;
- ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
-
- ctx->Const.MinLineWidth = 0x0001 / 8.0;
- ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
- ctx->Const.MaxLineWidth = 0xffff / 8.0;
- ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
+ ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
+ ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
- /* Needs further modifications */
-#if 0
- ctx->Const.MaxArrayLockSize =
- ( /*512 */ RADEON_BUFFER_SIZE * 16 * 1024) / (4 * 4);
-#endif
+ r600InitConstValues(ctx, screen);
- ctx->Const.MaxDrawBuffers = 1;
+ _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
/* Initialize the software rasterizer and helper modules.
*/
@@ -315,16 +366,12 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
_tnl_CreateContext(ctx);
_swsetup_CreateContext(ctx);
_swsetup_Wakeup(ctx);
- _ae_create_context(ctx);
/* Install the customized pipeline:
*/
_tnl_destroy_pipeline(ctx);
_tnl_install_pipeline(ctx, r700_pipeline);
-
- /* Try and keep materials and vertices separate:
- */
-/* _tnl_isolate_materials(ctx, GL_TRUE); */
+ TNL_CONTEXT(ctx)->Driver.RunPipeline = r600RunPipeline;
/* Configure swrast and TNL to match hardware characteristics:
*/
@@ -333,65 +380,16 @@ GLboolean r600CreateContext(const __GLcontextModes * glVisual,
_tnl_allow_pixel_fog(ctx, GL_FALSE);
_tnl_allow_vertex_fog(ctx, GL_TRUE);
- /* 256 for reg-based consts, inline consts also supported */
- ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
- ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
- ctx->Const.VertexProgram.MaxNativeAttribs = 160;
- ctx->Const.VertexProgram.MaxTemps = 128;
- ctx->Const.VertexProgram.MaxNativeTemps = 128;
- ctx->Const.VertexProgram.MaxNativeParameters = 256;
- ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
-
- ctx->Const.FragmentProgram.MaxNativeTemps = 128;
- ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
- ctx->Const.FragmentProgram.MaxNativeParameters = 256;
- ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
- /* 8 per clause on r6xx, 16 on rv670/r7xx */
- if ((screen->chip_family == CHIP_FAMILY_RV670) ||
- (screen->chip_family >= CHIP_FAMILY_RV770))
- ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
- else
- ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
- ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
- ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
- ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
- ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
- ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
-
radeon_init_debug();
- driInitExtensions(ctx, card_extensions, GL_TRUE);
- if (r600->radeon.radeonScreen->kernel_mm)
- driInitExtensions(ctx, mm_extensions, GL_FALSE);
-
- if (driQueryOptionb
- (&r600->radeon.optionCache, "disable_stencil_two_side"))
- _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
-
- if (r600->radeon.glCtx->Mesa_DXTn
- && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
- _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
- _mesa_enable_extension(ctx, "GL_S3_s3tc");
- } else
- if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
- {
- _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
- }
-
- r700InitDraw(ctx);
+ r700InitDraw(ctx);
radeon_fbo_init(&r600->radeon);
radeonInitSpanFuncs( ctx );
-
r600InitCmdBuf(r600);
-
r700InitState(r600->radeon.glCtx);
- TNL_CONTEXT(ctx)->Driver.RunPipeline = r600RunPipeline;
-
- if (driQueryOptionb(&r600->radeon.optionCache, "no_rast")) {
- radeon_warning("disabling 3D acceleration\n");
- }
+ r600InitGLExtensions(ctx);
return GL_TRUE;
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 10:32:12 +0000