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-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp15
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp11
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp15
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h3
6 files changed, 22 insertions, 28 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index a8610eea92a..9a764089a64 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2665,8 +2665,10 @@ fs_visitor::lower_uniform_pull_constant_loads()
}
void
-fs_visitor::dump_instruction(fs_inst *inst)
+fs_visitor::dump_instruction(backend_instruction *be_inst)
{
+ fs_inst *inst = (fs_inst *)be_inst;
+
if (inst->predicate) {
printf("(%cf0.%d) ",
inst->predicate_inverse ? '-' : '+',
@@ -2769,17 +2771,6 @@ fs_visitor::dump_instruction(fs_inst *inst)
printf("\n");
}
-void
-fs_visitor::dump_instructions()
-{
- int ip = 0;
- foreach_list(node, &this->instructions) {
- fs_inst *inst = (fs_inst *)node;
- printf("%d: ", ip++);
- dump_instruction(inst);
- }
-}
-
/**
* Possibly returns an instruction that set up @param reg.
*
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index c9c9856748d..bf7635779b2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -422,8 +422,7 @@ public:
void setup_builtin_uniform_values(ir_variable *ir);
int implied_mrf_writes(fs_inst *inst);
- void dump_instructions();
- void dump_instruction(fs_inst *inst);
+ void dump_instruction(backend_instruction *inst);
struct gl_fragment_program *fp;
struct brw_wm_compile *c;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 75468b1d194..3c63ba36aeb 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -552,3 +552,14 @@ backend_instruction::is_control_flow()
return false;
}
}
+
+void
+backend_visitor::dump_instructions()
+{
+ int ip = 0;
+ foreach_list(node, &this->instructions) {
+ backend_instruction *inst = (backend_instruction *)node;
+ printf("%d: ", ip++);
+ dump_instruction(inst);
+ }
+}
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 5189fdcb07e..4b2b399c62e 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -56,6 +56,9 @@ public:
* backend_instruction)
*/
exec_list instructions;
+
+ virtual void dump_instruction(backend_instruction *inst) = 0;
+ void dump_instructions();
};
int brw_type_for_base_type(const struct glsl_type *type);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index ab4668f425f..a3ae4a155a1 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1064,8 +1064,10 @@ vec4_visitor::split_virtual_grfs()
}
void
-vec4_visitor::dump_instruction(vec4_instruction *inst)
+vec4_visitor::dump_instruction(backend_instruction *be_inst)
{
+ vec4_instruction *inst = (vec4_instruction *)be_inst;
+
printf("%s ", brw_instruction_name(inst->opcode));
switch (inst->dst.file) {
@@ -1146,17 +1148,6 @@ vec4_visitor::dump_instruction(vec4_instruction *inst)
printf("\n");
}
-void
-vec4_visitor::dump_instructions()
-{
- int ip = 0;
- foreach_list_safe(node, &this->instructions) {
- vec4_instruction *inst = (vec4_instruction *)node;
- printf("%d: ", ip++);
- dump_instruction(inst);
- }
-}
-
/**
* Replace each register of type ATTR in this->instructions with a reference
* to a fixed HW register.
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index a4fca2d732a..cb97a863bc3 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -477,8 +477,7 @@ public:
bool process_move_condition(ir_rvalue *ir);
- void dump_instruction(vec4_instruction *inst);
- void dump_instructions();
+ void dump_instruction(backend_instruction *inst);
protected:
void emit_vertex();