diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUAsmPrinter.cpp | 16 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUAsmPrinter.h | 25 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUMCInstLower.cpp | 48 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUMCInstLower.h | 22 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.cpp | 34 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.h | 34 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp | 11 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/Makefile.sources | 3 |
8 files changed, 193 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUAsmPrinter.cpp b/src/gallium/drivers/radeon/AMDGPUAsmPrinter.cpp new file mode 100644 index 00000000000..4b7961e59d8 --- /dev/null +++ b/src/gallium/drivers/radeon/AMDGPUAsmPrinter.cpp @@ -0,0 +1,16 @@ + +#include "AMDGPUAsmPrinter.h" +#include "AMDGPU.h" +#include "llvm/Support/TargetRegistry.h" + +using namespace llvm; + + +static AsmPrinter *createAMDGPUAsmPrinterPass(TargetMachine &tm, + MCStreamer &Streamer) { + return new AMDGPUAsmPrinter(tm, Streamer); +} + +extern "C" void LLVMInitializeAMDGPUAsmPrinter() { + TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass); +} diff --git a/src/gallium/drivers/radeon/AMDGPUAsmPrinter.h b/src/gallium/drivers/radeon/AMDGPUAsmPrinter.h new file mode 100644 index 00000000000..865b18619e1 --- /dev/null +++ b/src/gallium/drivers/radeon/AMDGPUAsmPrinter.h @@ -0,0 +1,25 @@ + +#ifndef AMDGPU_ASMPRINTER_H +#define AMDGPU_ASMPRINTER_H + +#include "llvm/CodeGen/AsmPrinter.h" + +namespace llvm { + +class AMDGPUAsmPrinter : public AsmPrinter { + +public: + explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) + : AsmPrinter(TM, Streamer) { } + + virtual const char *getPassName() const { + return "AMDGPU Assembly Printer"; + } + + /// EmitInstuction - Implemented in AMDGPUMCInstLower.cpp + virtual void EmitInstruction(const MachineInstr *MI); +}; + +} // End anonymous llvm + +#endif //AMDGPU_ASMPRINTER_H diff --git a/src/gallium/drivers/radeon/AMDGPUMCInstLower.cpp b/src/gallium/drivers/radeon/AMDGPUMCInstLower.cpp new file mode 100644 index 00000000000..53bd561a2fe --- /dev/null +++ b/src/gallium/drivers/radeon/AMDGPUMCInstLower.cpp @@ -0,0 +1,48 @@ + +#include "AMDGPUMCInstLower.h" +#include "AMDGPUAsmPrinter.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/Constants.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +AMDGPUMCInstLower::AMDGPUMCInstLower() { } + +void AMDGPUMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { + OutMI.setOpcode(MI->getOpcode()); + + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + + MCOperand MCOp; + switch (MO.getType()) { + default: + MI->dump(); + llvm_unreachable("unknown operand type"); + case MachineOperand::MO_FPImmediate: { + const APFloat &FloatValue = MO.getFPImm()->getValueAPF(); + assert(&FloatValue.getSemantics() == &APFloat::IEEEsingle && + "Only floating point immediates are supported at the moment."); + MCOp = MCOperand::CreateFPImm(FloatValue.convertToFloat()); + break; + } + case MachineOperand::MO_Immediate: + MCOp = MCOperand::CreateImm(MO.getImm()); + break; + case MachineOperand::MO_Register: + MCOp = MCOperand::CreateReg(MO.getReg()); + break; + } + OutMI.addOperand(MCOp); + } +} + +void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) { + AMDGPUMCInstLower MCInstLowering; + MCInst TmpInst; + MCInstLowering.Lower(MI, TmpInst); + OutStreamer.EmitInstruction(TmpInst); +} diff --git a/src/gallium/drivers/radeon/AMDGPUMCInstLower.h b/src/gallium/drivers/radeon/AMDGPUMCInstLower.h new file mode 100644 index 00000000000..2ea5b0205eb --- /dev/null +++ b/src/gallium/drivers/radeon/AMDGPUMCInstLower.h @@ -0,0 +1,22 @@ + +#ifndef AMDGPU_MCINSTLOWER_H +#define AMDGPU_MCINSTLOWER_H + +namespace llvm { + +class MCInst; +class MachineInstr; + +class AMDGPUMCInstLower { + +public: + AMDGPUMCInstLower(); + + /// Lower - Lower a MachineInstr to an MCInst + void Lower(const MachineInstr *MI, MCInst &OutMI) const; + +}; + +} // End namespace llvm + +#endif //AMDGPU_MCINSTLOWER_H diff --git a/src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.cpp b/src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.cpp new file mode 100644 index 00000000000..b6ab9b22fb1 --- /dev/null +++ b/src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.cpp @@ -0,0 +1,34 @@ + +#include "AMDGPUInstPrinter.h" +#include "llvm/MC/MCInst.h" + +using namespace llvm; + +void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, + StringRef Annot) { + printInstruction(MI, OS); + + printAnnotation(OS, Annot); +} + +void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, + raw_ostream &O) { + + const MCOperand &Op = MI->getOperand(OpNo); + if (Op.isReg()) { + O << getRegisterName(Op.getReg()); + } else if (Op.isImm()) { + O << Op.getImm(); + } else if (Op.isFPImm()) { + O << Op.getFPImm(); + } else { + assert(!"unknown operand type in printOperand"); + } +} + +void AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo, + raw_ostream &O) { + printOperand(MI, OpNo, O); +} + +#include "AMDGPUGenAsmWriter.inc" diff --git a/src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.h b/src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.h new file mode 100644 index 00000000000..62c1a5ee04f --- /dev/null +++ b/src/gallium/drivers/radeon/InstPrinter/AMDGPUInstPrinter.h @@ -0,0 +1,34 @@ + +#ifndef AMDGPUINSTPRINTER_H +#define AMDGPUINSTPRINTER_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCInstPrinter.h" +#include "llvm/Support/raw_ostream.h" + +namespace llvm { + +class AMDGPUInstPrinter : public MCInstPrinter { +public: + AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, + const MCRegisterInfo &MRI) + : MCInstPrinter(MAI, MII, MRI) {} + + //Autogenerated by tblgen + void printInstruction(const MCInst *MI, raw_ostream &O); + static const char *getRegisterName(unsigned RegNo); + +// virtual void printRegName(raw_ostream &OS, unsigned RegNo) const; + virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); + +private: + void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); +// void printUnsignedImm(const MCInst *MI, int OpNo, raw_ostream &O); + void printMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); + + +}; + +} // End namespace llvm + +#endif // AMDGPUINSTRPRINTER_H diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp index fd35e9e17d9..24cfb1f5355 100644 --- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp +++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp @@ -1,5 +1,6 @@ #include "AMDILMCTargetDesc.h" #include "AMDILMCAsmInfo.h" +#include "InstPrinter/AMDGPUInstPrinter.h" #include "llvm/MC/MachineLocation.h" #include "llvm/MC/MCCodeGenInfo.h" #include "llvm/MC/MCInstrInfo.h" @@ -46,6 +47,15 @@ static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, return X; } +static MCInstPrinter *createAMDGPUMCInstPrinter(const Target &T, + unsigned SyntaxVariant, + const MCAsmInfo &MAI, + const MCInstrInfo &MII, + const MCRegisterInfo &MRI, + const MCSubtargetInfo &STI) { + return new AMDGPUInstPrinter(MAI, MII, MRI); +} + extern "C" void LLVMInitializeAMDGPUTargetMC() { RegisterMCAsmInfo<AMDILMCAsmInfo> Y(TheAMDGPUTarget); @@ -58,4 +68,5 @@ extern "C" void LLVMInitializeAMDGPUTargetMC() { TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDGPUMCSubtargetInfo); + TargetRegistry::RegisterMCInstPrinter(TheAMDGPUTarget, createAMDGPUMCInstPrinter); } diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index 0e9825f0fe8..7f934ba6683 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -28,6 +28,8 @@ CPP_SOURCES := \ AMDILNIDevice.cpp \ AMDILPeepholeOptimizer.cpp \ AMDILSIDevice.cpp \ + AMDGPUAsmPrinter.cpp \ + AMDGPUMCInstLower.cpp \ AMDGPUSubtarget.cpp \ AMDGPUTargetMachine.cpp \ AMDGPUISelLowering.cpp \ @@ -47,6 +49,7 @@ CPP_SOURCES := \ SIISelLowering.cpp \ SIMachineFunctionInfo.cpp \ SIRegisterInfo.cpp \ + InstPrinter/AMDGPUInstPrinter.cpp \ MCTargetDesc/AMDILMCAsmInfo.cpp \ MCTargetDesc/AMDILMCTargetDesc.cpp \ TargetInfo/AMDILTargetInfo.cpp \ |