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-rw-r--r--src/intel/compiler/brw_vec4_nir.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 0a1caa9fad8..9200ffa0ed7 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -2228,6 +2228,15 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
}
}
+ /* TXS and TXL require a LOD but not everything we implement using those
+ * two opcodes provides one. Provide a default LOD of 0.
+ */
+ if ((instr->op == nir_texop_txs ||
+ instr->op == nir_texop_txl) &&
+ lod.file == BAD_FILE) {
+ lod = brw_imm_ud(0u);
+ }
+
if (instr->op == nir_texop_txf_ms ||
instr->op == nir_texop_samples_identical) {
assert(coord_type != NULL);