diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 35 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_hw_context.c | 10 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 37 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_shaders.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_viewport.c | 258 |
10 files changed, 184 insertions, 182 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 949d313bb5e..d50982b8636 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -738,7 +738,6 @@ bool si_common_context_init(struct r600_common_context *rctx, rctx->b.set_device_reset_callback = r600_set_device_reset_callback; si_init_context_texture_functions(rctx); - si_init_viewport_functions(rctx); si_streamout_init(rctx); si_init_query_functions(rctx); si_init_msaa(&rctx->b); diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 4508a768768..1558943bfec 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -120,7 +120,6 @@ struct u_log_context; #define DBG_NO_DFSM (1ull << 55) #define R600_MAP_BUFFER_ALIGNMENT 64 -#define R600_MAX_VIEWPORTS 16 #define SI_MAX_VARIABLE_THREADS_PER_BLOCK 1024 @@ -523,27 +522,6 @@ struct r600_streamout { int num_prims_gen_queries; }; -struct r600_signed_scissor { - int minx; - int miny; - int maxx; - int maxy; -}; - -struct r600_scissors { - struct r600_atom atom; - unsigned dirty_mask; - struct pipe_scissor_state states[R600_MAX_VIEWPORTS]; -}; - -struct r600_viewports { - struct r600_atom atom; - unsigned dirty_mask; - unsigned depth_range_dirty_mask; - struct pipe_viewport_state states[R600_MAX_VIEWPORTS]; - struct r600_signed_scissor as_scissor[R600_MAX_VIEWPORTS]; -}; - struct r600_ring { struct radeon_winsys_cs *cs; void (*flush)(void *ctx, unsigned flags, @@ -590,12 +568,6 @@ struct r600_common_context { /* States. */ struct r600_streamout streamout; - struct r600_scissors scissors; - struct r600_viewports viewports; - bool scissor_enabled; - bool clip_halfz; - bool vs_writes_viewport_index; - bool vs_disables_clipping_viewport; /* Additional context states. */ unsigned flags; /* flush flags */ @@ -879,13 +851,6 @@ bool si_texture_disable_dcc(struct r600_common_context *rctx, void si_init_screen_texture_functions(struct r600_common_screen *rscreen); void si_init_context_texture_functions(struct r600_common_context *rctx); -/* r600_viewport.c */ -void si_viewport_set_rast_deps(struct r600_common_context *rctx, - bool scissor_enable, bool clip_halfz); -void si_update_vs_writes_viewport_index(struct r600_common_context *rctx, - struct tgsi_shader_info *info); -void si_init_viewport_functions(struct r600_common_context *rctx); - /* cayman_msaa.c */ void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count, unsigned sample_index, float *out_value); diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index f5ae072f4f8..b8ff67d5ab7 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -70,8 +70,8 @@ static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op) util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state); util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso); util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask); - util_blitter_save_viewport(sctx->blitter, &sctx->b.viewports.states[0]); - util_blitter_save_scissor(sctx->blitter, &sctx->b.scissors.states[0]); + util_blitter_save_viewport(sctx->blitter, &sctx->viewports.states[0]); + util_blitter_save_scissor(sctx->blitter, &sctx->scissors.states[0]); } if (op & SI_SAVE_FRAMEBUFFER) diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c index dafb3bfa5fe..ef03a6d2c68 100644 --- a/src/gallium/drivers/radeonsi/si_hw_context.c +++ b/src/gallium/drivers/radeonsi/si_hw_context.c @@ -248,11 +248,11 @@ void si_begin_new_cs(struct si_context *ctx) si_all_descriptors_begin_new_cs(ctx); si_all_resident_buffers_begin_new_cs(ctx); - ctx->b.scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - ctx->b.viewports.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - ctx->b.viewports.depth_range_dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - si_mark_atom_dirty(ctx, &ctx->b.scissors.atom); - si_mark_atom_dirty(ctx, &ctx->b.viewports.atom); + ctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + ctx->viewports.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + ctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(ctx, &ctx->scissors.atom); + si_mark_atom_dirty(ctx, &ctx->viewports.atom); si_mark_atom_dirty(ctx, &ctx->scratch_state); if (ctx->scratch_buffer) { diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 954f9ff063f..33f5adbd3ad 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -230,6 +230,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, si_init_all_descriptors(sctx); si_init_state_functions(sctx); si_init_shader_functions(sctx); + si_init_viewport_functions(sctx); si_init_ia_multi_vgt_param_table(sctx); if (sctx->b.chip_class >= CIK) @@ -620,7 +621,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param) /* Viewports and render targets. */ case PIPE_CAP_MAX_VIEWPORTS: - return R600_MAX_VIEWPORTS; + return SI_MAX_VIEWPORTS; case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: case PIPE_CAP_MAX_RENDER_TARGETS: return 8; diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 08d47ea414e..b3d5b186457 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -81,6 +81,7 @@ #define SI_PREFETCH_PS (1 << 6) #define SI_MAX_BORDER_COLORS 4096 +#define SI_MAX_VIEWPORTS 16 #define SIX_BITS 0x3F struct si_compute; @@ -212,6 +213,27 @@ struct si_framebuffer { bool DB_has_shader_readable_metadata; }; +struct si_signed_scissor { + int minx; + int miny; + int maxx; + int maxy; +}; + +struct si_scissors { + struct r600_atom atom; + unsigned dirty_mask; + struct pipe_scissor_state states[SI_MAX_VIEWPORTS]; +}; + +struct si_viewports { + struct r600_atom atom; + unsigned dirty_mask; + unsigned depth_range_dirty_mask; + struct pipe_viewport_state states[SI_MAX_VIEWPORTS]; + struct si_signed_scissor as_scissor[SI_MAX_VIEWPORTS]; +}; + struct si_clip_state { struct r600_atom atom; struct pipe_clip_state state; @@ -326,6 +348,8 @@ struct si_context { struct si_shader_data shader_pointers; struct si_stencil_ref stencil_ref; struct r600_atom spi_map; + struct si_scissors scissors; + struct si_viewports viewports; /* Precomputed states. */ struct si_pm4_state *init_config; @@ -437,6 +461,11 @@ struct si_context { bool need_check_render_feedback; bool decompression_enabled; + bool scissor_enabled; + bool clip_halfz; + bool vs_writes_viewport_index; + bool vs_disables_clipping_viewport; + /* Precomputed IA_MULTI_VGT_PARAM */ union si_vgt_param_key ia_multi_vgt_param_key; unsigned ia_multi_vgt_param[SI_NUM_VGT_PARAM_STATES]; @@ -536,6 +565,14 @@ struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context, struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe, const struct pipe_video_buffer *tmpl); +/* si_viewport.c */ +void si_viewport_set_rast_deps(struct si_context *rctx, + bool scissor_enable, bool clip_halfz); +void si_update_vs_writes_viewport_index(struct si_context *ctx, + struct tgsi_shader_info *info); +void si_init_viewport_functions(struct si_context *ctx); + + /* * common helpers */ diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 3fbacec5668..2dbe7c6e274 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1003,7 +1003,7 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state) sctx->current_vs_state &= C_VS_STATE_CLAMP_VERTEX_COLOR; sctx->current_vs_state |= S_VS_STATE_CLAMP_VERTEX_COLOR(rs->clamp_vertex_color); - si_viewport_set_rast_deps(&sctx->b, rs->scissor_enable, rs->clip_halfz); + si_viewport_set_rast_deps(sctx, rs->scissor_enable, rs->clip_halfz); si_pm4_bind_state(sctx, rasterizer, rs); si_update_poly_offset_state(sctx); @@ -4402,8 +4402,8 @@ void si_init_state_functions(struct si_context *sctx) si_init_external_atom(sctx, &sctx->b.render_cond_atom, &sctx->atoms.s.render_cond); si_init_external_atom(sctx, &sctx->b.streamout.begin_atom, &sctx->atoms.s.streamout_begin); si_init_external_atom(sctx, &sctx->b.streamout.enable_atom, &sctx->atoms.s.streamout_enable); - si_init_external_atom(sctx, &sctx->b.scissors.atom, &sctx->atoms.s.scissors); - si_init_external_atom(sctx, &sctx->b.viewports.atom, &sctx->atoms.s.viewports); + si_init_external_atom(sctx, &sctx->scissors.atom, &sctx->atoms.s.scissors); + si_init_external_atom(sctx, &sctx->viewports.atom, &sctx->atoms.s.viewports); si_init_atom(sctx, &sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state); si_init_atom(sctx, &sctx->msaa_sample_locs.atom, &sctx->atoms.s.msaa_sample_locs, si_emit_msaa_sample_locs); diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 42807c03091..9a6c9c8f842 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1261,8 +1261,8 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) bool old_is_poly = sctx->b.current_rast_prim >= PIPE_PRIM_TRIANGLES; bool new_is_poly = rast_prim >= PIPE_PRIM_TRIANGLES; if (old_is_poly != new_is_poly) { - sctx->b.scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - si_set_atom_dirty(sctx, &sctx->b.scissors.atom, true); + sctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(sctx, &sctx->scissors.atom); } sctx->b.current_rast_prim = rast_prim; @@ -1398,7 +1398,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) * involved alternative workaround. */ if (sctx->b.chip_class == GFX9 && - si_is_atom_dirty(sctx, &sctx->b.scissors.atom)) { + si_is_atom_dirty(sctx, &sctx->scissors.atom)) { sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH; si_emit_cache_flush(sctx); } diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 1146e5e3949..42814d9fd58 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -2301,7 +2301,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state) sctx->vs_shader.current = sel ? sel->first_variant : NULL; si_update_common_shader_state(sctx); - si_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx)); + si_update_vs_writes_viewport_index(sctx, si_get_vs_info(sctx)); si_set_active_descriptors_for_shader(sctx, sel); si_update_streamout_state(sctx); si_update_clip_regs(sctx, old_hw_vs, old_hw_vs_variant, @@ -2344,7 +2344,7 @@ static void si_bind_gs_shader(struct pipe_context *ctx, void *state) if (sctx->ia_multi_vgt_param_key.u.uses_tess) si_update_tess_uses_prim_id(sctx); } - si_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx)); + si_update_vs_writes_viewport_index(sctx, si_get_vs_info(sctx)); si_set_active_descriptors_for_shader(sctx, sel); si_update_streamout_state(sctx); si_update_clip_regs(sctx, old_hw_vs, old_hw_vs_variant, @@ -2395,7 +2395,7 @@ static void si_bind_tes_shader(struct pipe_context *ctx, void *state) si_shader_change_notify(sctx); sctx->last_tes_sh_base = -1; /* invalidate derived tess state */ } - si_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx)); + si_update_vs_writes_viewport_index(sctx, si_get_vs_info(sctx)); si_set_active_descriptors_for_shader(sctx, sel); si_update_streamout_state(sctx); si_update_clip_regs(sctx, old_hw_vs, old_hw_vs_variant, diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c index 54f31c4694d..d462f7d0a28 100644 --- a/src/gallium/drivers/radeonsi/si_state_viewport.c +++ b/src/gallium/drivers/radeonsi/si_state_viewport.c @@ -21,36 +21,38 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "si_pipe.h" +#include "sid.h" #include "radeon/r600_cs.h" #include "util/u_viewport.h" #include "tgsi/tgsi_scan.h" -#define GET_MAX_SCISSOR(rctx) (rctx->chip_class >= EVERGREEN ? 16384 : 8192) +#define SI_MAX_SCISSOR 16384 -static void r600_set_scissor_states(struct pipe_context *ctx, - unsigned start_slot, - unsigned num_scissors, - const struct pipe_scissor_state *state) +static void si_set_scissor_states(struct pipe_context *pctx, + unsigned start_slot, + unsigned num_scissors, + const struct pipe_scissor_state *state) { - struct r600_common_context *rctx = (struct r600_common_context *)ctx; + struct si_context *ctx = (struct si_context *)pctx; int i; for (i = 0; i < num_scissors; i++) - rctx->scissors.states[start_slot + i] = state[i]; + ctx->scissors.states[start_slot + i] = state[i]; - if (!rctx->scissor_enabled) + if (!ctx->scissor_enabled) return; - rctx->scissors.dirty_mask |= ((1 << num_scissors) - 1) << start_slot; - rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); + ctx->scissors.dirty_mask |= ((1 << num_scissors) - 1) << start_slot; + si_mark_atom_dirty(ctx, &ctx->scissors.atom); } /* Since the guard band disables clipping, we have to clip per-pixel * using a scissor. */ -static void r600_get_scissor_from_viewport(struct r600_common_context *rctx, - const struct pipe_viewport_state *vp, - struct r600_signed_scissor *scissor) +static void si_get_scissor_from_viewport(struct si_context *ctx, + const struct pipe_viewport_state *vp, + struct si_signed_scissor *scissor) { float tmp, minx, miny, maxx, maxy; @@ -63,7 +65,7 @@ static void r600_get_scissor_from_viewport(struct r600_common_context *rctx, /* r600_draw_rectangle sets this. Disable the scissor. */ if (minx == -1 && miny == -1 && maxx == 1 && maxy == 1) { scissor->minx = scissor->miny = 0; - scissor->maxx = scissor->maxy = GET_MAX_SCISSOR(rctx); + scissor->maxx = scissor->maxy = SI_MAX_SCISSOR; return; } @@ -86,19 +88,18 @@ static void r600_get_scissor_from_viewport(struct r600_common_context *rctx, scissor->maxy = ceilf(maxy); } -static void r600_clamp_scissor(struct r600_common_context *rctx, - struct pipe_scissor_state *out, - struct r600_signed_scissor *scissor) +static void si_clamp_scissor(struct si_context *ctx, + struct pipe_scissor_state *out, + struct si_signed_scissor *scissor) { - unsigned max_scissor = GET_MAX_SCISSOR(rctx); - out->minx = CLAMP(scissor->minx, 0, max_scissor); - out->miny = CLAMP(scissor->miny, 0, max_scissor); - out->maxx = CLAMP(scissor->maxx, 0, max_scissor); - out->maxy = CLAMP(scissor->maxy, 0, max_scissor); + out->minx = CLAMP(scissor->minx, 0, SI_MAX_SCISSOR); + out->miny = CLAMP(scissor->miny, 0, SI_MAX_SCISSOR); + out->maxx = CLAMP(scissor->maxx, 0, SI_MAX_SCISSOR); + out->maxy = CLAMP(scissor->maxy, 0, SI_MAX_SCISSOR); } -static void r600_clip_scissor(struct pipe_scissor_state *out, - struct pipe_scissor_state *clip) +static void si_clip_scissor(struct pipe_scissor_state *out, + struct pipe_scissor_state *clip) { out->minx = MAX2(out->minx, clip->minx); out->miny = MAX2(out->miny, clip->miny); @@ -106,8 +107,8 @@ static void r600_clip_scissor(struct pipe_scissor_state *out, out->maxy = MIN2(out->maxy, clip->maxy); } -static void r600_scissor_make_union(struct r600_signed_scissor *out, - struct r600_signed_scissor *in) +static void si_scissor_make_union(struct si_signed_scissor *out, + struct si_signed_scissor *in) { out->minx = MIN2(out->minx, in->minx); out->miny = MIN2(out->miny, in->miny); @@ -115,22 +116,22 @@ static void r600_scissor_make_union(struct r600_signed_scissor *out, out->maxy = MAX2(out->maxy, in->maxy); } -static void r600_emit_one_scissor(struct r600_common_context *rctx, - struct radeon_winsys_cs *cs, - struct r600_signed_scissor *vp_scissor, - struct pipe_scissor_state *scissor) +static void si_emit_one_scissor(struct si_context *ctx, + struct radeon_winsys_cs *cs, + struct si_signed_scissor *vp_scissor, + struct pipe_scissor_state *scissor) { struct pipe_scissor_state final; - if (rctx->vs_disables_clipping_viewport) { + if (ctx->vs_disables_clipping_viewport) { final.minx = final.miny = 0; - final.maxx = final.maxy = GET_MAX_SCISSOR(rctx); + final.maxx = final.maxy = SI_MAX_SCISSOR; } else { - r600_clamp_scissor(rctx, &final, vp_scissor); + si_clamp_scissor(ctx, &final, vp_scissor); } if (scissor) - r600_clip_scissor(&final, scissor); + si_clip_scissor(&final, scissor); radeon_emit(cs, S_028250_TL_X(final.minx) | S_028250_TL_Y(final.miny) | @@ -140,12 +141,12 @@ static void r600_emit_one_scissor(struct r600_common_context *rctx, } /* the range is [-MAX, MAX] */ -#define GET_MAX_VIEWPORT_RANGE(rctx) (rctx->chip_class >= EVERGREEN ? 32768 : 16384) +#define GET_MAX_VIEWPORT_RANGE(rctx) (32768) -static void r600_emit_guardband(struct r600_common_context *rctx, - struct r600_signed_scissor *vp_as_scissor) +static void si_emit_guardband(struct si_context *ctx, + struct si_signed_scissor *vp_as_scissor) { - struct radeon_winsys_cs *cs = rctx->gfx.cs; + struct radeon_winsys_cs *cs = ctx->b.gfx.cs; struct pipe_viewport_state vp; float left, top, right, bottom, max_range, guardband_x, guardband_y; float discard_x, discard_y; @@ -171,7 +172,7 @@ static void r600_emit_guardband(struct r600_common_context *rctx, * * Use a limit one pixel smaller to allow for some precision error. */ - max_range = GET_MAX_VIEWPORT_RANGE(rctx) - 1; + max_range = GET_MAX_VIEWPORT_RANGE(ctx) - 1; left = (-max_range - vp.translate[0]) / vp.scale[0]; right = ( max_range - vp.translate[0]) / vp.scale[0]; top = (-max_range - vp.translate[1]) / vp.scale[1]; @@ -185,7 +186,7 @@ static void r600_emit_guardband(struct r600_common_context *rctx, discard_x = 1.0; discard_y = 1.0; - if (rctx->current_rast_prim < PIPE_PRIM_TRIANGLES) { + if (ctx->b.current_rast_prim < PIPE_PRIM_TRIANGLES) { /* When rendering wide points or lines, we need to be more * conservative about when to discard them entirely. Since * point size can be determined by the VS output, we basically @@ -199,10 +200,7 @@ static void r600_emit_guardband(struct r600_common_context *rctx, } /* If any of the GB registers is updated, all of them must be updated. */ - if (rctx->chip_class >= CAYMAN) - radeon_set_context_reg_seq(cs, CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4); - else - radeon_set_context_reg_seq(cs, R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ, 4); + radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4); radeon_emit(cs, fui(guardband_y)); /* R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */ radeon_emit(cs, fui(discard_y)); /* R_028BEC_PA_CL_GB_VERT_DISC_ADJ */ @@ -210,34 +208,35 @@ static void r600_emit_guardband(struct r600_common_context *rctx, radeon_emit(cs, fui(discard_x)); /* R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */ } -static void r600_emit_scissors(struct r600_common_context *rctx, struct r600_atom *atom) +static void si_emit_scissors(struct r600_common_context *rctx, struct r600_atom *atom) { - struct radeon_winsys_cs *cs = rctx->gfx.cs; - struct pipe_scissor_state *states = rctx->scissors.states; - unsigned mask = rctx->scissors.dirty_mask; - bool scissor_enabled = rctx->scissor_enabled; - struct r600_signed_scissor max_vp_scissor; + struct si_context *ctx = (struct si_context *)rctx; + struct radeon_winsys_cs *cs = ctx->b.gfx.cs; + struct pipe_scissor_state *states = ctx->scissors.states; + unsigned mask = ctx->scissors.dirty_mask; + bool scissor_enabled = ctx->scissor_enabled; + struct si_signed_scissor max_vp_scissor; int i; /* The simple case: Only 1 viewport is active. */ - if (!rctx->vs_writes_viewport_index) { - struct r600_signed_scissor *vp = &rctx->viewports.as_scissor[0]; + if (!ctx->vs_writes_viewport_index) { + struct si_signed_scissor *vp = &ctx->viewports.as_scissor[0]; if (!(mask & 1)) return; radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL, 2); - r600_emit_one_scissor(rctx, cs, vp, scissor_enabled ? &states[0] : NULL); - r600_emit_guardband(rctx, vp); - rctx->scissors.dirty_mask &= ~1; /* clear one bit */ + si_emit_one_scissor(ctx, cs, vp, scissor_enabled ? &states[0] : NULL); + si_emit_guardband(ctx, vp); + ctx->scissors.dirty_mask &= ~1; /* clear one bit */ return; } /* Shaders can draw to any viewport. Make a union of all viewports. */ - max_vp_scissor = rctx->viewports.as_scissor[0]; - for (i = 1; i < R600_MAX_VIEWPORTS; i++) - r600_scissor_make_union(&max_vp_scissor, - &rctx->viewports.as_scissor[i]); + max_vp_scissor = ctx->viewports.as_scissor[0]; + for (i = 1; i < SI_MAX_VIEWPORTS; i++) + si_scissor_make_union(&max_vp_scissor, + &ctx->viewports.as_scissor[i]); while (mask) { int start, count, i; @@ -247,43 +246,43 @@ static void r600_emit_scissors(struct r600_common_context *rctx, struct r600_ato radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL + start * 4 * 2, count * 2); for (i = start; i < start+count; i++) { - r600_emit_one_scissor(rctx, cs, &rctx->viewports.as_scissor[i], - scissor_enabled ? &states[i] : NULL); + si_emit_one_scissor(ctx, cs, &ctx->viewports.as_scissor[i], + scissor_enabled ? &states[i] : NULL); } } - r600_emit_guardband(rctx, &max_vp_scissor); - rctx->scissors.dirty_mask = 0; + si_emit_guardband(ctx, &max_vp_scissor); + ctx->scissors.dirty_mask = 0; } -static void r600_set_viewport_states(struct pipe_context *ctx, - unsigned start_slot, - unsigned num_viewports, - const struct pipe_viewport_state *state) +static void si_set_viewport_states(struct pipe_context *pctx, + unsigned start_slot, + unsigned num_viewports, + const struct pipe_viewport_state *state) { - struct r600_common_context *rctx = (struct r600_common_context *)ctx; + struct si_context *ctx = (struct si_context *)pctx; unsigned mask; int i; for (i = 0; i < num_viewports; i++) { unsigned index = start_slot + i; - rctx->viewports.states[index] = state[i]; - r600_get_scissor_from_viewport(rctx, &state[i], - &rctx->viewports.as_scissor[index]); + ctx->viewports.states[index] = state[i]; + si_get_scissor_from_viewport(ctx, &state[i], + &ctx->viewports.as_scissor[index]); } mask = ((1 << num_viewports) - 1) << start_slot; - rctx->viewports.dirty_mask |= mask; - rctx->viewports.depth_range_dirty_mask |= mask; - rctx->scissors.dirty_mask |= mask; - rctx->set_atom_dirty(rctx, &rctx->viewports.atom, true); - rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); + ctx->viewports.dirty_mask |= mask; + ctx->viewports.depth_range_dirty_mask |= mask; + ctx->scissors.dirty_mask |= mask; + si_mark_atom_dirty(ctx, &ctx->viewports.atom); + si_mark_atom_dirty(ctx, &ctx->scissors.atom); } -static void r600_emit_one_viewport(struct r600_common_context *rctx, - struct pipe_viewport_state *state) +static void si_emit_one_viewport(struct si_context *ctx, + struct pipe_viewport_state *state) { - struct radeon_winsys_cs *cs = rctx->gfx.cs; + struct radeon_winsys_cs *cs = ctx->b.gfx.cs; radeon_emit(cs, fui(state->scale[0])); radeon_emit(cs, fui(state->translate[0])); @@ -293,20 +292,20 @@ static void r600_emit_one_viewport(struct r600_common_context *rctx, radeon_emit(cs, fui(state->translate[2])); } -static void r600_emit_viewports(struct r600_common_context *rctx) +static void si_emit_viewports(struct si_context *ctx) { - struct radeon_winsys_cs *cs = rctx->gfx.cs; - struct pipe_viewport_state *states = rctx->viewports.states; - unsigned mask = rctx->viewports.dirty_mask; + struct radeon_winsys_cs *cs = ctx->b.gfx.cs; + struct pipe_viewport_state *states = ctx->viewports.states; + unsigned mask = ctx->viewports.dirty_mask; /* The simple case: Only 1 viewport is active. */ - if (!rctx->vs_writes_viewport_index) { + if (!ctx->vs_writes_viewport_index) { if (!(mask & 1)) return; radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE, 6); - r600_emit_one_viewport(rctx, &states[0]); - rctx->viewports.dirty_mask &= ~1; /* clear one bit */ + si_emit_one_viewport(ctx, &states[0]); + ctx->viewports.dirty_mask &= ~1; /* clear one bit */ return; } @@ -318,29 +317,29 @@ static void r600_emit_viewports(struct r600_common_context *rctx) radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE + start * 4 * 6, count * 6); for (i = start; i < start+count; i++) - r600_emit_one_viewport(rctx, &states[i]); + si_emit_one_viewport(ctx, &states[i]); } - rctx->viewports.dirty_mask = 0; + ctx->viewports.dirty_mask = 0; } -static void r600_emit_depth_ranges(struct r600_common_context *rctx) +static void si_emit_depth_ranges(struct si_context *ctx) { - struct radeon_winsys_cs *cs = rctx->gfx.cs; - struct pipe_viewport_state *states = rctx->viewports.states; - unsigned mask = rctx->viewports.depth_range_dirty_mask; + struct radeon_winsys_cs *cs = ctx->b.gfx.cs; + struct pipe_viewport_state *states = ctx->viewports.states; + unsigned mask = ctx->viewports.depth_range_dirty_mask; float zmin, zmax; /* The simple case: Only 1 viewport is active. */ - if (!rctx->vs_writes_viewport_index) { + if (!ctx->vs_writes_viewport_index) { if (!(mask & 1)) return; - util_viewport_zmin_zmax(&states[0], rctx->clip_halfz, &zmin, &zmax); + util_viewport_zmin_zmax(&states[0], ctx->clip_halfz, &zmin, &zmax); radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); radeon_emit(cs, fui(zmin)); radeon_emit(cs, fui(zmax)); - rctx->viewports.depth_range_dirty_mask &= ~1; /* clear one bit */ + ctx->viewports.depth_range_dirty_mask &= ~1; /* clear one bit */ return; } @@ -352,34 +351,35 @@ static void r600_emit_depth_ranges(struct r600_common_context *rctx) radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + start * 4 * 2, count * 2); for (i = start; i < start+count; i++) { - util_viewport_zmin_zmax(&states[i], rctx->clip_halfz, &zmin, &zmax); + util_viewport_zmin_zmax(&states[i], ctx->clip_halfz, &zmin, &zmax); radeon_emit(cs, fui(zmin)); radeon_emit(cs, fui(zmax)); } } - rctx->viewports.depth_range_dirty_mask = 0; + ctx->viewports.depth_range_dirty_mask = 0; } -static void r600_emit_viewport_states(struct r600_common_context *rctx, - struct r600_atom *atom) +static void si_emit_viewport_states(struct r600_common_context *rctx, + struct r600_atom *atom) { - r600_emit_viewports(rctx); - r600_emit_depth_ranges(rctx); + struct si_context *ctx = (struct si_context *)rctx; + si_emit_viewports(ctx); + si_emit_depth_ranges(ctx); } /* Set viewport dependencies on pipe_rasterizer_state. */ -void si_viewport_set_rast_deps(struct r600_common_context *rctx, +void si_viewport_set_rast_deps(struct si_context *ctx, bool scissor_enable, bool clip_halfz) { - if (rctx->scissor_enabled != scissor_enable) { - rctx->scissor_enabled = scissor_enable; - rctx->scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); + if (ctx->scissor_enabled != scissor_enable) { + ctx->scissor_enabled = scissor_enable; + ctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(ctx, &ctx->scissors.atom); } - if (rctx->clip_halfz != clip_halfz) { - rctx->clip_halfz = clip_halfz; - rctx->viewports.depth_range_dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - rctx->set_atom_dirty(rctx, &rctx->viewports.atom, true); + if (ctx->clip_halfz != clip_halfz) { + ctx->clip_halfz = clip_halfz; + ctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(ctx, &ctx->viewports.atom); } } @@ -389,7 +389,7 @@ void si_viewport_set_rast_deps(struct r600_common_context *rctx, * is delayed. When a shader with VIEWPORT_INDEX appears, this should be * called to emit the rest. */ -void si_update_vs_writes_viewport_index(struct r600_common_context *rctx, +void si_update_vs_writes_viewport_index(struct si_context *ctx, struct tgsi_shader_info *info) { bool vs_window_space; @@ -401,33 +401,33 @@ void si_update_vs_writes_viewport_index(struct r600_common_context *rctx, vs_window_space = info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION]; - if (rctx->vs_disables_clipping_viewport != vs_window_space) { - rctx->vs_disables_clipping_viewport = vs_window_space; - rctx->scissors.dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; - rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); + if (ctx->vs_disables_clipping_viewport != vs_window_space) { + ctx->vs_disables_clipping_viewport = vs_window_space; + ctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(ctx, &ctx->scissors.atom); } /* Viewport index handling. */ - rctx->vs_writes_viewport_index = info->writes_viewport_index; - if (!rctx->vs_writes_viewport_index) + ctx->vs_writes_viewport_index = info->writes_viewport_index; + if (!ctx->vs_writes_viewport_index) return; - if (rctx->scissors.dirty_mask) - rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); + if (ctx->scissors.dirty_mask) + si_mark_atom_dirty(ctx, &ctx->scissors.atom); - if (rctx->viewports.dirty_mask || - rctx->viewports.depth_range_dirty_mask) - rctx->set_atom_dirty(rctx, &rctx->viewports.atom, true); + if (ctx->viewports.dirty_mask || + ctx->viewports.depth_range_dirty_mask) + si_mark_atom_dirty(ctx, &ctx->viewports.atom); } -void si_init_viewport_functions(struct r600_common_context *rctx) +void si_init_viewport_functions(struct si_context *ctx) { - rctx->scissors.atom.emit = r600_emit_scissors; - rctx->viewports.atom.emit = r600_emit_viewport_states; + ctx->scissors.atom.emit = si_emit_scissors; + ctx->viewports.atom.emit = si_emit_viewport_states; - rctx->scissors.atom.num_dw = (2 + 16 * 2) + 6; - rctx->viewports.atom.num_dw = 2 + 16 * 6; + ctx->scissors.atom.num_dw = (2 + 16 * 2) + 6; + ctx->viewports.atom.num_dw = 2 + 16 * 6; - rctx->b.set_scissor_states = r600_set_scissor_states; - rctx->b.set_viewport_states = r600_set_viewport_states; + ctx->b.b.set_scissor_states = si_set_scissor_states; + ctx->b.b.set_viewport_states = si_set_viewport_states; } |