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-rw-r--r--src/mesa/drivers/dri/i965/brw_program.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp14
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp39
3 files changed, 14 insertions, 49 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 0e4b823b6e9..a034dacd87b 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -142,9 +142,7 @@ brwProgramStringNotify(struct gl_context *ctx,
brw_add_texrect_params(prog);
- if (ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions) {
- prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_FRAGMENT, true);
- }
+ prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_FRAGMENT, true);
brw_fs_precompile(ctx, NULL, prog);
break;
@@ -168,10 +166,8 @@ brwProgramStringNotify(struct gl_context *ctx,
brw_add_texrect_params(prog);
- if (ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].NirOptions) {
- prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX,
- brw->intelScreen->compiler->scalar_vs);
- }
+ prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX,
+ brw->intelScreen->compiler->scalar_vs);
brw_vs_precompile(ctx, NULL, prog);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index af85bd241ec..2c23f53c635 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -142,8 +142,7 @@ brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo)
if (devinfo->gen < 7)
compiler->glsl_compiler_options[i].EmitNoIndirectSampler = true;
- if (is_scalar || brw_env_var_as_boolean("INTEL_USE_NIR", true))
- compiler->glsl_compiler_options[i].NirOptions = nir_options;
+ compiler->glsl_compiler_options[i].NirOptions = nir_options;
}
return compiler;
@@ -271,8 +270,6 @@ process_glsl_ir(gl_shader_stage stage,
brw_lower_texture_gradients(brw, shader->ir);
do_vec_index_to_cond_assign(shader->ir);
lower_vector_insert(shader->ir, true);
- if (options->NirOptions == NULL)
- brw_do_cubemap_normalize(shader->ir);
lower_offset_arrays(shader->ir);
brw_do_lower_unnormalized_offset(shader->ir);
lower_noise(shader->ir);
@@ -341,9 +338,6 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
struct gl_shader *shader = shProg->_LinkedShaders[stage];
- const struct gl_shader_compiler_options *options =
- &ctx->Const.ShaderCompilerOptions[stage];
-
if (!shader)
continue;
@@ -391,10 +385,8 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
brw_add_texrect_params(prog);
- if (options->NirOptions) {
- prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
- is_scalar_shader_stage(compiler, stage));
- }
+ prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
+ is_scalar_shader_stage(compiler, stage));
_mesa_reference_program(ctx, &prog, NULL);
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index c61b38548f7..056ce398225 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1786,9 +1786,6 @@ vec4_visitor::emit_shader_time_write(int shader_time_subindex, src_reg value)
bool
vec4_visitor::run()
{
- bool use_vec4_nir =
- compiler->glsl_compiler_options[stage].NirOptions != NULL;
-
sanity_param_count = prog->Parameters->NumParameters;
if (shader_time_index >= 0)
@@ -1798,19 +1795,10 @@ vec4_visitor::run()
emit_prolog();
- if (use_vec4_nir) {
- assert(prog->nir != NULL);
- emit_nir_code();
- if (failed)
- return false;
- } else if (shader) {
- /* Generate VS IR for main(). (the visitor only descends into
- * functions called "main").
- */
- visit_instructions(shader->base.ir);
- } else {
- emit_program_code();
- }
+ assert(prog->nir != NULL);
+ emit_nir_code();
+ if (failed)
+ return false;
base_ir = NULL;
emit_thread_end();
@@ -1823,18 +1811,9 @@ vec4_visitor::run()
* that we have reladdr computations available for CSE, since we'll
* often do repeated subexpressions for those.
*/
- if (shader || use_vec4_nir) {
- move_grf_array_access_to_scratch();
- move_uniform_array_access_to_pull_constants();
- } else {
- /* The ARB_vertex_program frontend emits pull constant loads directly
- * rather than using reladdr, so we don't need to walk through all the
- * instructions looking for things to move. There isn't anything.
- *
- * We do still need to split things to vec4 size.
- */
- split_uniform_registers();
- }
+ move_grf_array_access_to_scratch();
+ move_uniform_array_access_to_pull_constants();
+
pack_uniform_registers();
move_push_constants_to_pull_constants();
split_virtual_grfs();
@@ -1974,9 +1953,7 @@ brw_vs_emit(struct brw_context *brw,
if (unlikely(INTEL_DEBUG & DEBUG_VS))
brw_dump_ir("vertex", prog, &shader->base, &vp->Base);
- if (!vp->Base.nir &&
- (brw->intelScreen->compiler->scalar_vs ||
- brw->intelScreen->compiler->glsl_compiler_options[MESA_SHADER_VERTEX].NirOptions != NULL)) {
+ if (!vp->Base.nir) {
/* Normally we generate NIR in LinkShader() or
* ProgramStringNotify(), but Mesa's fixed-function vertex program
* handling doesn't notify the driver at all. Just do it here, at