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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_clear.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c20
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c4
-rw-r--r--src/mesa/drivers/dri/i965/intel_fbo.c98
-rw-r--r--src/mesa/drivers/dri/i965/intel_fbo.h50
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c209
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h59
8 files changed, 168 insertions, 276 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 0aeb651cefd..39a15edfd8f 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -193,7 +193,7 @@ do_blorp_blit(struct brw_context *brw, GLbitfield buffer_bit,
dstX0, dstY0, dstX1, dstY1,
filter, mirror_x, mirror_y);
- intel_renderbuffer_set_needs_downsample(dst_irb);
+ dst_irb->need_downsample = true;
}
static bool
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index 94672e00e35..9159df5978c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
@@ -592,7 +592,7 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
return false;
}
- intel_renderbuffer_set_needs_downsample(irb);
+ irb->need_downsample = true;
}
return true;
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index ba2f971bcc1..1071f9f805c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -997,7 +997,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw,
if (rb->mt->num_samples <= 1)
intel_miptree_resolve_color(brw, rb->mt);
else
- intel_miptree_downsample(brw, rb->mt);
+ intel_renderbuffer_downsample(brw, rb);
}
}
@@ -1270,10 +1270,9 @@ intel_process_dri2_buffer(struct brw_context *brw,
rb->mt->region->name == buffer->name)
return;
} else {
- if (rb->mt &&
- rb->mt->singlesample_mt &&
- rb->mt->singlesample_mt->region &&
- rb->mt->singlesample_mt->region->name == buffer->name)
+ if (rb->singlesample_mt &&
+ rb->singlesample_mt->region &&
+ rb->singlesample_mt->region->name == buffer->name)
return;
}
@@ -1308,7 +1307,7 @@ intel_process_dri2_buffer(struct brw_context *brw,
(buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
buffer->attachment == __DRI_BUFFER_FAKE_FRONT_LEFT) &&
rb->Base.Base.NumSamples > 1) {
- intel_miptree_upsample(brw, rb->mt);
+ intel_renderbuffer_upsample(brw, rb);
}
assert(rb->mt);
@@ -1355,10 +1354,9 @@ intel_update_image_buffer(struct brw_context *intel,
rb->mt->region->bo == region->bo)
return;
} else {
- if (rb->mt &&
- rb->mt->singlesample_mt &&
- rb->mt->singlesample_mt->region &&
- rb->mt->singlesample_mt->region->bo == region->bo)
+ if (rb->singlesample_mt &&
+ rb->singlesample_mt->region &&
+ rb->singlesample_mt->region->bo == region->bo)
return;
}
@@ -1367,7 +1365,7 @@ intel_update_image_buffer(struct brw_context *intel,
if (intel->is_front_buffer_rendering &&
buffer_type == __DRI_IMAGE_BUFFER_FRONT &&
rb->Base.Base.NumSamples > 1) {
- intel_miptree_upsample(intel, rb->mt);
+ intel_renderbuffer_upsample(intel, rb);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 484c4c181b1..540834c2422 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -351,9 +351,9 @@ static void brw_postdraw_set_buffers_need_resolve(struct brw_context *brw)
front_irb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);
if (front_irb)
- intel_renderbuffer_set_needs_downsample(front_irb);
+ front_irb->need_downsample = true;
if (back_irb)
- intel_renderbuffer_set_needs_downsample(back_irb);
+ back_irb->need_downsample = true;
if (depth_irb && ctx->Depth.Mask)
intel_renderbuffer_att_set_needs_depth_resolve(depth_att);
}
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index cd148f0f488..d11cdb6605c 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -74,11 +74,41 @@ intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb)
ASSERT(irb);
intel_miptree_release(&irb->mt);
+ intel_miptree_release(&irb->singlesample_mt);
_mesa_delete_renderbuffer(ctx, rb);
}
/**
+ * \brief Downsample a winsys renderbuffer from mt to singlesample_mt.
+ *
+ * If the miptree needs no downsample, then skip.
+ */
+void
+intel_renderbuffer_downsample(struct brw_context *brw,
+ struct intel_renderbuffer *irb)
+{
+ if (!irb->need_downsample)
+ return;
+ intel_miptree_updownsample(brw, irb->mt, irb->singlesample_mt);
+ irb->need_downsample = false;
+}
+
+/**
+ * \brief Upsample a winsys renderbuffer from singlesample_mt to mt.
+ *
+ * The upsample is done unconditionally.
+ */
+void
+intel_renderbuffer_upsample(struct brw_context *brw,
+ struct intel_renderbuffer *irb)
+{
+ assert(!irb->need_downsample);
+
+ intel_miptree_updownsample(brw, irb->singlesample_mt, irb->mt);
+}
+
+/**
* \see dd_function_table::MapRenderbuffer
*/
static void
@@ -92,6 +122,7 @@ intel_map_renderbuffer(struct gl_context *ctx,
struct brw_context *brw = brw_context(ctx);
struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ struct intel_mipmap_tree *mt;
void *map;
int stride;
@@ -106,6 +137,39 @@ intel_map_renderbuffer(struct gl_context *ctx,
intel_prepare_render(brw);
+ /* The MapRenderbuffer API should always return a single-sampled mapping.
+ * The case we are asked to map multisampled RBs is in glReadPixels() (or
+ * swrast paths like glCopyTexImage()) from a window-system MSAA buffer,
+ * and GL expects an automatic resolve to happen.
+ *
+ * If it's a color miptree, there is a ->singlesample_mt which wraps the
+ * actual window system renderbuffer (which we may resolve to at any time),
+ * while the miptree itself is our driver-private allocation. If it's a
+ * depth or stencil miptree, we have a private MSAA buffer and no shared
+ * singlesample buffer, and since we don't expect anybody to ever actually
+ * resolve it, we just make a temporary singlesample buffer now when we
+ * have to.
+ */
+ if (rb->NumSamples > 1) {
+ if (!irb->singlesample_mt) {
+ irb->singlesample_mt =
+ intel_miptree_create_for_renderbuffer(brw, irb->mt->format,
+ rb->Width, rb->Height,
+ 0 /*num_samples*/);
+ if (!irb->singlesample_mt)
+ goto fail;
+ irb->singlesample_mt_is_tmp = true;
+ irb->need_downsample = true;
+ }
+
+ intel_renderbuffer_downsample(brw, irb);
+ mt = irb->singlesample_mt;
+
+ irb->need_map_upsample = mode & GL_MAP_WRITE_BIT;
+ } else {
+ mt = irb->mt;
+ }
+
/* For a window-system renderbuffer, we need to flip the mapping we receive
* upside-down. So we need to ask for a rectangle on flipped vertically, and
* we then return a pointer to the bottom of it with a negative stride.
@@ -114,7 +178,7 @@ intel_map_renderbuffer(struct gl_context *ctx,
y = rb->Height - y - h;
}
- intel_miptree_map(brw, irb->mt, irb->mt_level, irb->mt_layer,
+ intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer,
x, y, w, h, mode, &map, &stride);
if (rb->Name == 0) {
@@ -128,6 +192,11 @@ intel_map_renderbuffer(struct gl_context *ctx,
*out_map = map;
*out_stride = stride;
+ return;
+
+fail:
+ *out_map = NULL;
+ *out_stride = 0;
}
/**
@@ -140,6 +209,7 @@ intel_unmap_renderbuffer(struct gl_context *ctx,
struct brw_context *brw = brw_context(ctx);
struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
+ struct intel_mipmap_tree *mt;
DBG("%s: rb %d (%s)\n", __FUNCTION__,
rb->Name, _mesa_get_format_name(rb->Format));
@@ -150,7 +220,21 @@ intel_unmap_renderbuffer(struct gl_context *ctx,
return;
}
- intel_miptree_unmap(brw, irb->mt, irb->mt_level, irb->mt_layer);
+ if (rb->NumSamples > 1) {
+ mt = irb->singlesample_mt;
+ } else {
+ mt = irb->mt;
+ }
+
+ intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer);
+
+ if (irb->need_map_upsample) {
+ intel_renderbuffer_upsample(brw, irb);
+ irb->need_map_upsample = false;
+ }
+
+ if (irb->singlesample_mt_is_tmp)
+ intel_miptree_release(&irb->singlesample_mt);
}
@@ -788,16 +872,6 @@ intel_blit_framebuffer(struct gl_context *ctx,
}
/**
- * This is a no-op except on multisample buffers shared with DRI2.
- */
-void
-intel_renderbuffer_set_needs_downsample(struct intel_renderbuffer *irb)
-{
- if (irb->mt && irb->mt->singlesample_mt)
- irb->mt->need_downsample = true;
-}
-
-/**
* Does the renderbuffer have hiz enabled?
*/
bool
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h
index 45e2cd89d9e..b8db7e2d73f 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.h
+++ b/src/mesa/drivers/dri/i965/intel_fbo.h
@@ -49,7 +49,26 @@ struct intel_texture_image;
struct intel_renderbuffer
{
struct swrast_renderbuffer Base;
- struct intel_mipmap_tree *mt; /**< The renderbuffer storage. */
+ /**
+ * The real renderbuffer storage.
+ *
+ * This is multisampled if NumSamples is > 1.
+ */
+ struct intel_mipmap_tree *mt;
+
+ /**
+ * Downsampled contents for window-system MSAA renderbuffers.
+ *
+ * For window system MSAA color buffers, the singlesample_mt is shared with
+ * other processes in DRI2 (and in DRI3, it's the image buffer managed by
+ * glx_dri3.c), while mt is private to our process. To do a swapbuffers,
+ * we have to downsample out of mt into singlesample_mt. For depth and
+ * stencil buffers, the singlesample_mt is also private, and since we don't
+ * expect to need to do resolves (except if someone does a glReadPixels()
+ * or glCopyTexImage()), we just temporarily allocate singlesample_mt when
+ * asked to map the renderbuffer.
+ */
+ struct intel_mipmap_tree *singlesample_mt;
/**
* \name Miptree view
@@ -74,6 +93,24 @@ struct intel_renderbuffer
/** \} */
GLuint draw_x, draw_y; /**< Offset of drawing within the region */
+
+ /**
+ * Set to true at every draw call, to indicate if a window-system
+ * renderbuffer needs to be downsampled before using singlesample_mt.
+ */
+ bool need_downsample;
+
+ /**
+ * Set to true when doing an intel_renderbuffer_map()/unmap() that requires
+ * an upsample at the end.
+ */
+ bool need_map_upsample;
+
+ /**
+ * Set to true if singlesample_mt is temporary storage that persists only
+ * for the duration of a mapping.
+ */
+ bool singlesample_mt_is_tmp;
};
@@ -157,9 +194,6 @@ intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb,
tile_x, tile_y);
}
-void
-intel_renderbuffer_set_needs_downsample(struct intel_renderbuffer *irb);
-
bool
intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb);
@@ -195,6 +229,14 @@ void intel_renderbuffer_move_to_temp(struct brw_context *brw,
struct intel_renderbuffer *irb,
bool invalidate);
+void
+intel_renderbuffer_downsample(struct brw_context *brw,
+ struct intel_renderbuffer *irb);
+
+void
+intel_renderbuffer_upsample(struct brw_context *brw,
+ struct intel_renderbuffer *irb);
+
unsigned
intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index c5c8a362f9d..dcc8b6e2c5b 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -728,10 +728,9 @@ intel_update_winsys_renderbuffer_miptree(struct brw_context *intel,
return NULL;
}
- multisample_mt->singlesample_mt = singlesample_mt;
- multisample_mt->need_downsample = false;
-
+ irb->need_downsample = false;
irb->mt = multisample_mt;
+ irb->singlesample_mt = singlesample_mt;
}
struct intel_mipmap_tree*
@@ -799,7 +798,6 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
intel_miptree_release(&(*mt)->stencil_mt);
intel_miptree_release(&(*mt)->hiz_mt);
intel_miptree_release(&(*mt)->mcs_mt);
- intel_miptree_release(&(*mt)->singlesample_mt);
intel_resolve_map_clear(&(*mt)->hiz_map);
for (i = 0; i < MAX_TEXTURE_LEVELS; i++) {
@@ -1547,7 +1545,7 @@ intel_offset_S8(uint32_t stride, uint32_t x, uint32_t y, bool swizzled)
return u;
}
-static void
+void
intel_miptree_updownsample(struct brw_context *brw,
struct intel_mipmap_tree *src,
struct intel_mipmap_tree *dst)
@@ -1573,49 +1571,6 @@ intel_miptree_updownsample(struct brw_context *brw,
}
}
-static void
-assert_is_flat(struct intel_mipmap_tree *mt)
-{
- assert(mt->target == GL_TEXTURE_2D ||
- mt->target == GL_TEXTURE_2D_MULTISAMPLE);
- assert(mt->first_level == 0);
- assert(mt->last_level == 0);
-}
-
-/**
- * \brief Downsample from mt to mt->singlesample_mt.
- *
- * If the miptree needs no downsample, then skip.
- */
-void
-intel_miptree_downsample(struct brw_context *brw,
- struct intel_mipmap_tree *mt)
-{
- /* Only flat, renderbuffer-like miptrees are supported. */
- assert_is_flat(mt);
-
- if (!mt->need_downsample)
- return;
- intel_miptree_updownsample(brw, mt, mt->singlesample_mt);
- mt->need_downsample = false;
-}
-
-/**
- * \brief Upsample from mt->singlesample_mt to mt.
- *
- * The upsample is done unconditionally.
- */
-void
-intel_miptree_upsample(struct brw_context *brw,
- struct intel_mipmap_tree *mt)
-{
- /* Only flat, renderbuffer-like miptrees are supported. */
- assert_is_flat(mt);
- assert(!mt->need_downsample);
-
- intel_miptree_updownsample(brw, mt->singlesample_mt, mt);
-}
-
void *
intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt)
{
@@ -2164,18 +2119,18 @@ can_blit_slice(struct intel_mipmap_tree *mt,
return true;
}
-static void
-intel_miptree_map_singlesample(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level,
- unsigned int slice,
- unsigned int x,
- unsigned int y,
- unsigned int w,
- unsigned int h,
- GLbitfield mode,
- void **out_ptr,
- int *out_stride)
+void
+intel_miptree_map(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ unsigned int level,
+ unsigned int slice,
+ unsigned int x,
+ unsigned int y,
+ unsigned int w,
+ unsigned int h,
+ GLbitfield mode,
+ void **out_ptr,
+ int *out_stride)
{
struct intel_miptree_map *map;
@@ -2228,11 +2183,11 @@ intel_miptree_map_singlesample(struct brw_context *brw,
intel_miptree_release_map(mt, level, slice);
}
-static void
-intel_miptree_unmap_singlesample(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level,
- unsigned int slice)
+void
+intel_miptree_unmap(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ unsigned int level,
+ unsigned int slice)
{
struct intel_miptree_map *map = mt->level[level].slice[slice].map;
@@ -2263,127 +2218,3 @@ intel_miptree_unmap_singlesample(struct brw_context *brw,
intel_miptree_release_map(mt, level, slice);
}
-
-static void
-intel_miptree_map_multisample(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level,
- unsigned int slice,
- unsigned int x,
- unsigned int y,
- unsigned int w,
- unsigned int h,
- GLbitfield mode,
- void **out_ptr,
- int *out_stride)
-{
- struct gl_context *ctx = &brw->ctx;
- struct intel_miptree_map *map;
-
- assert(mt->num_samples > 1);
-
- /* Only flat, renderbuffer-like miptrees are supported. */
- if (mt->target != GL_TEXTURE_2D_MULTISAMPLE ||
- mt->first_level != 0 ||
- mt->last_level != 0) {
- _mesa_problem(ctx, "attempt to map a multisample miptree for "
- "which (target, first_level, last_level != "
- "(GL_TEXTURE_2D, 0, 0)");
- goto fail;
- }
-
- map = intel_miptree_attach_map(mt, level, slice, x, y, w, h, mode);
- if (!map)
- goto fail;
-
- if (!mt->singlesample_mt) {
- mt->singlesample_mt =
- intel_miptree_create_for_renderbuffer(brw,
- mt->format,
- mt->logical_width0,
- mt->logical_height0,
- 0 /*num_samples*/);
- if (!mt->singlesample_mt)
- goto fail;
-
- map->singlesample_mt_is_tmp = true;
- mt->need_downsample = true;
- }
-
- intel_miptree_downsample(brw, mt);
- intel_miptree_map_singlesample(brw, mt->singlesample_mt,
- level, slice,
- x, y, w, h,
- mode,
- out_ptr, out_stride);
- return;
-
-fail:
- intel_miptree_release_map(mt, level, slice);
- *out_ptr = NULL;
- *out_stride = 0;
-}
-
-static void
-intel_miptree_unmap_multisample(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level,
- unsigned int slice)
-{
- struct intel_miptree_map *map = mt->level[level].slice[slice].map;
-
- assert(mt->num_samples > 1);
-
- if (!map)
- return;
-
- intel_miptree_unmap_singlesample(brw, mt->singlesample_mt, level, slice);
-
- mt->need_downsample = false;
- if (map->mode & GL_MAP_WRITE_BIT)
- intel_miptree_upsample(brw, mt);
-
- if (map->singlesample_mt_is_tmp)
- intel_miptree_release(&mt->singlesample_mt);
-
- intel_miptree_release_map(mt, level, slice);
-}
-
-void
-intel_miptree_map(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level,
- unsigned int slice,
- unsigned int x,
- unsigned int y,
- unsigned int w,
- unsigned int h,
- GLbitfield mode,
- void **out_ptr,
- int *out_stride)
-{
- if (mt->num_samples <= 1)
- intel_miptree_map_singlesample(brw, mt,
- level, slice,
- x, y, w, h,
- mode,
- out_ptr, out_stride);
- else
- intel_miptree_map_multisample(brw, mt,
- level, slice,
- x, y, w, h,
- mode,
- out_ptr, out_stride);
-}
-
-void
-intel_miptree_unmap(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- unsigned int level,
- unsigned int slice)
-{
- if (mt->num_samples <= 1)
- intel_miptree_unmap_singlesample(brw, mt, level, slice);
- else
- intel_miptree_unmap_multisample(brw, mt, level, slice);
-}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 753e938d625..aa3247bcf77 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -93,12 +93,6 @@ struct intel_miptree_map {
void *ptr;
/** Stride of the mapping. */
int stride;
-
- /**
- * intel_mipmap_tree::singlesample_mt is temporary storage that persists
- * only for the duration of the map.
- */
- bool singlesample_mt_is_tmp;
};
/**
@@ -371,50 +365,6 @@ struct intel_mipmap_tree
uint32_t offset;
/**
- * \brief Singlesample miptree.
- *
- * This is used under two cases.
- *
- * --- Case 1: As persistent singlesample storage for multisample window
- * system front and back buffers ---
- *
- * Suppose that the window system FBO was created with a multisample
- * config. Let `back_irb` be the `intel_renderbuffer` for the FBO's back
- * buffer. Then `back_irb` contains two miptrees: a parent multisample
- * miptree (back_irb->mt) and a child singlesample miptree
- * (back_irb->mt->singlesample_mt). The DRM buffer shared with DRI2
- * belongs to `back_irb->mt->singlesample_mt` and contains singlesample
- * data. The singlesample miptree is created at the same time as and
- * persists for the lifetime of its parent multisample miptree.
- *
- * When access to the singlesample data is needed, such as at
- * eglSwapBuffers and glReadPixels, an automatic downsample occurs from
- * `back_rb->mt` to `back_rb->mt->singlesample_mt` when necessary.
- *
- * This description of the back buffer applies analogously to the front
- * buffer.
- *
- *
- * --- Case 2: As temporary singlesample storage for mapping multisample
- * miptrees ---
- *
- * Suppose the intel_miptree_map is called on a multisample miptree, `mt`,
- * for which case 1 does not apply (that is, `mt` does not belong to
- * a front or back buffer). Then `mt->singlesample_mt` is null at the
- * start of the call. intel_miptree_map will create a temporary
- * singlesample miptree, store it at `mt->singlesample_mt`, downsample from
- * `mt` to `mt->singlesample_mt` if necessary, then map
- * `mt->singlesample_mt`. The temporary miptree is later deleted during
- * intel_miptree_unmap.
- */
- struct intel_mipmap_tree *singlesample_mt;
-
- /**
- * \brief A downsample is needed from this miptree to singlesample_mt.
- */
- bool need_downsample;
-
- /**
* \brief HiZ miptree
*
* The hiz miptree contains the miptree's hiz buffer. To allocate the hiz
@@ -699,12 +649,9 @@ intel_miptree_make_shareable(struct brw_context *brw,
struct intel_mipmap_tree *mt);
void
-intel_miptree_downsample(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
-
-void
-intel_miptree_upsample(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
+intel_miptree_updownsample(struct brw_context *brw,
+ struct intel_mipmap_tree *src,
+ struct intel_mipmap_tree *dst);
void brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 23:50:29 +0000