diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 9 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 6 |
2 files changed, 9 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 3b4b8135976..fd5227d2c55 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -663,11 +663,14 @@ #define BRW_MESSAGE_TARGET_MATH 1 /* reserved on GEN6 */ #define BRW_MESSAGE_TARGET_SAMPLER 2 #define BRW_MESSAGE_TARGET_GATEWAY 3 -#define BRW_MESSAGE_TARGET_DATAPORT_READ 4 /* sampler cache on GEN6 */ -#define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5 /* render cache on Gen6 */ +#define BRW_MESSAGE_TARGET_DATAPORT_READ 4 +#define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5 #define BRW_MESSAGE_TARGET_URB 6 #define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7 -#define BRW_MESSAGE_TARGET_CONST_CACHE 9 /* GEN6 */ + +#define GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE 4 +#define GEN6_MESSAGE_TARGET_DP_RENDER_CACHE 5 +#define GEN6_MESSAGE_TARGET_DP_CONST_CACHE 9 #define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 859068ec4eb..82b71374343 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -498,7 +498,7 @@ static void brw_set_dp_write_message( struct brw_context *brw, insn->bits3.dp_render_cache.end_of_thread = end_of_thread; /* We always use the render cache for write messages */ - insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_DATAPORT_WRITE; + insn->header.destreg__conditionalmod = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE; } else if (intel->gen == 5) { insn->bits3.dp_write_gen5.binding_table_index = binding_table_index; insn->bits3.dp_write_gen5.msg_control = msg_control; @@ -541,9 +541,9 @@ brw_set_dp_read_message(struct brw_context *brw, uint32_t target_function; if (target_cache == BRW_DATAPORT_READ_TARGET_DATA_CACHE) - target_function = BRW_MESSAGE_TARGET_DATAPORT_READ; /* data cache */ + target_function = GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE; else - target_function = BRW_MESSAGE_TARGET_DATAPORT_WRITE; /* render cache */ + target_function = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE; insn->bits3.dp_render_cache.binding_table_index = binding_table_index; insn->bits3.dp_render_cache.msg_control = msg_control; |