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-rw-r--r--src/intel/blorp/blorp.c1
-rw-r--r--src/intel/blorp/blorp_genX_exec.h3
-rw-r--r--src/intel/blorp/blorp_priv.h1
3 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index fe5dccdeb59..9c88658e8ac 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -294,6 +294,7 @@ blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
blorp_params_init(&params);
params.hiz_op = op;
+ params.full_surface_hiz_op = true;
for (uint32_t a = 0; a < num_layers; a++) {
const uint32_t layer = start_layer + a;
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 7c8a9416c58..1d77877db53 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1470,11 +1470,14 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
hzp.StencilBufferClearEnable = params->stencil.enabled;
hzp.DepthBufferClearEnable = params->depth.enabled;
hzp.StencilClearValue = params->stencil_ref;
+ hzp.FullSurfaceDepthandStencilClear = params->full_surface_hiz_op;
break;
case BLORP_HIZ_OP_DEPTH_RESOLVE:
+ assert(params->full_surface_hiz_op);
hzp.DepthBufferResolveEnable = true;
break;
case BLORP_HIZ_OP_HIZ_RESOLVE:
+ assert(params->full_surface_hiz_op);
hzp.HierarchicalDepthBufferResolveEnable = true;
break;
case BLORP_HIZ_OP_NONE:
diff --git a/src/intel/blorp/blorp_priv.h b/src/intel/blorp/blorp_priv.h
index 99772308fe6..b265362f9b1 100644
--- a/src/intel/blorp/blorp_priv.h
+++ b/src/intel/blorp/blorp_priv.h
@@ -185,6 +185,7 @@ struct blorp_params
struct brw_blorp_surface_info src;
struct brw_blorp_surface_info dst;
enum blorp_hiz_op hiz_op;
+ bool full_surface_hiz_op;
enum blorp_fast_clear_op fast_clear_op;
bool color_write_disable[4];
struct brw_blorp_wm_inputs wm_inputs;