diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 31a5e410e9f..a76f1bb25af 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -3777,11 +3777,6 @@ void visit_store_ls_or_es_output(isel_context *ctx, nir_intrinsic_instr *instr) { Builder bld(ctx->program, ctx->block); - std::pair<Temp, unsigned> offs = get_intrinsic_io_basic_offset(ctx, instr, 4u); - Temp src = get_ssa_temp(ctx, instr->src[0].ssa); - unsigned write_mask = nir_intrinsic_write_mask(instr); - unsigned elem_size_bytes = instr->src[0].ssa->bit_size / 8u; - if (ctx->tcs_in_out_eq && store_output_to_temps(ctx, instr)) { /* When the TCS only reads this output directly and for the same vertices as its invocation id, it is unnecessary to store the VS output to LDS. */ bool indirect_write; @@ -3790,6 +3785,11 @@ void visit_store_ls_or_es_output(isel_context *ctx, nir_intrinsic_instr *instr) return; } + std::pair<Temp, unsigned> offs = get_intrinsic_io_basic_offset(ctx, instr, 4u); + Temp src = get_ssa_temp(ctx, instr->src[0].ssa); + unsigned write_mask = nir_intrinsic_write_mask(instr); + unsigned elem_size_bytes = instr->src[0].ssa->bit_size / 8u; + if (ctx->stage == vertex_es || ctx->stage == tess_eval_es) { /* GFX6-8: ES stage is not merged into GS, data is passed from ES to GS in VMEM. */ Temp esgs_ring = bld.smem(aco_opcode::s_load_dwordx4, bld.def(s4), ctx->program->private_segment_buffer, Operand(RING_ESGS_VS * 16u)); |