diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/intel/compiler/brw_eu_defines.h | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs.h | 3 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 34 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 6 | ||||
| -rw-r--r-- | src/intel/compiler/brw_shader.cpp | 4 |
6 files changed, 4 insertions, 47 deletions
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index affe977835b..b7bd104be59 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -523,8 +523,6 @@ enum opcode { FS_OPCODE_DISCARD_JUMP, FS_OPCODE_SET_SAMPLE_ID, FS_OPCODE_PACK_HALF_2x16_SPLIT, - FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X, - FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y, FS_OPCODE_PLACEHOLDER_HALT, FS_OPCODE_INTERPOLATE_AT_SAMPLE, FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET, diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index cfc1a470886..c4052be978f 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -5475,8 +5475,6 @@ get_lowered_simd_width(const struct gen_device_info *devinfo, case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7: case FS_OPCODE_PACK_HALF_2x16_SPLIT: - case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X: - case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 7edaa3af43c..d141a9237df 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -461,9 +461,6 @@ private: struct brw_reg dst, struct brw_reg x, struct brw_reg y); - void generate_unpack_half_2x16_split(fs_inst *inst, - struct brw_reg dst, - struct brw_reg src); void generate_shader_time_add(fs_inst *inst, struct brw_reg payload, diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 84627e83132..9088c97d92b 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1756,35 +1756,6 @@ fs_generator::generate_pack_half_2x16_split(fs_inst *, } void -fs_generator::generate_unpack_half_2x16_split(fs_inst *inst, - struct brw_reg dst, - struct brw_reg src) -{ - assert(devinfo->gen >= 7); - assert(dst.type == BRW_REGISTER_TYPE_F); - assert(src.type == BRW_REGISTER_TYPE_UD); - - /* From the Ivybridge PRM, Vol4, Part3, Section 6.26 f16to32: - * - * Because this instruction does not have a 16-bit floating-point type, - * the source data type must be Word (W). The destination type must be - * F (Float). - */ - struct brw_reg src_w = spread(retype(src, BRW_REGISTER_TYPE_W), 2); - - /* Each channel of src has the form of unpackHalf2x16's input: 0xhhhhllll. - * For the Y case, we wish to access only the upper word; therefore - * a 16-bit subregister offset is needed. - */ - assert(inst->opcode == FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X || - inst->opcode == FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y); - if (inst->opcode == FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y) - src_w.subnr += 2; - - brw_F16TO32(p, dst, src_w); -} - -void fs_generator::generate_shader_time_add(fs_inst *, struct brw_reg payload, struct brw_reg offset, @@ -2421,11 +2392,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) generate_pack_half_2x16_split(inst, dst, src[0], src[1]); break; - case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X: - case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y: - generate_unpack_half_2x16_split(inst, dst, src[0]); - break; - case FS_OPCODE_PLACEHOLDER_HALT: /* This is the place where the final HALT needs to be inserted if * we've emitted any discards. If not, this will emit no code. diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 312cd22de79..fe3dff016ad 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1319,11 +1319,13 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) unreachable("not reached: should be handled by lower_packing_builtins"); case nir_op_unpack_half_2x16_split_x: - inst = bld.emit(FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X, result, op[0]); + inst = bld.emit(BRW_OPCODE_F16TO32, result, + subscript(op[0], BRW_REGISTER_TYPE_UW, 0)); inst->saturate = instr->dest.saturate; break; case nir_op_unpack_half_2x16_split_y: - inst = bld.emit(FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y, result, op[0]); + inst = bld.emit(BRW_OPCODE_F16TO32, result, + subscript(op[0], BRW_REGISTER_TYPE_UW, 1)); inst->saturate = instr->dest.saturate; break; diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index b77bd798d17..97966c951a1 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -415,10 +415,6 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op) case FS_OPCODE_PACK_HALF_2x16_SPLIT: return "pack_half_2x16_split"; - case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X: - return "unpack_half_2x16_split_x"; - case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y: - return "unpack_half_2x16_split_y"; case FS_OPCODE_PLACEHOLDER_HALT: return "placeholder_halt"; |