diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs.c | 9 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs.h | 7 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs_emit.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_sol_state.c | 2 |
4 files changed, 19 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 850d7b455fc..f9c4f6aa014 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -154,6 +154,13 @@ static void compile_gs_prog( struct brw_context *brw, static void populate_key( struct brw_context *brw, struct brw_gs_prog_key *key ) { + static const unsigned swizzle_for_offset[4] = { + BRW_SWIZZLE4(0, 1, 2, 3), + BRW_SWIZZLE4(1, 2, 3, 3), + BRW_SWIZZLE4(2, 3, 3, 3), + BRW_SWIZZLE4(3, 3, 3, 3) + }; + struct gl_context *ctx = &brw->intel.ctx; struct intel_context *intel = &brw->intel; @@ -207,6 +214,8 @@ static void populate_key( struct brw_context *brw, for (i = 0; i < key->num_transform_feedback_bindings; ++i) { key->transform_feedback_bindings[i] = linked_xfb_info->Outputs[i].OutputRegister; + key->transform_feedback_swizzles[i] = + swizzle_for_offset[linked_xfb_info->Outputs[i].ComponentOffset]; } } /* On Gen6, GS is also used for rasterizer discard. */ diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h index 2ab8b724eac..f2597c8abab 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.h +++ b/src/mesa/drivers/dri/i965/brw_gs.h @@ -63,6 +63,13 @@ struct brw_gs_prog_key { * entry. */ unsigned char transform_feedback_bindings[BRW_MAX_SOL_BINDINGS]; + + /** + * Map from the index of a transform feedback binding table entry to the + * swizzles that should be used when streaming out data through that + * binding table entry. + */ + unsigned char transform_feedback_swizzles[BRW_MAX_SOL_BINDINGS]; }; struct brw_gs_compile { diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c index 407450170bf..501cee42ea4 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c @@ -448,7 +448,7 @@ gen6_sol_program(struct brw_gs_compile *c, struct brw_gs_prog_key *key, vertex_slot.subnr = (slot % 2) * 16; /* gl_PointSize is stored in VERT_RESULT_PSIZ.w. */ vertex_slot.dw1.bits.swizzle = vert_result == VERT_RESULT_PSIZ - ? BRW_SWIZZLE_WWWW : BRW_SWIZZLE_NOOP; + ? BRW_SWIZZLE_WWWW : key->transform_feedback_swizzles[binding]; brw_set_access_mode(p, BRW_ALIGN_16); brw_MOV(p, stride(c->reg.header, 4, 4, 1), retype(vertex_slot, BRW_REGISTER_TYPE_UD)); diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c index df6b9ee0f13..674e14f1252 100644 --- a/src/mesa/drivers/dri/i965/gen7_sol_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c @@ -129,6 +129,8 @@ upload_3dstate_so_decl_list(struct brw_context *brw, if (vert_result == VERT_RESULT_PSIZ) { assert(linked_xfb_info->Outputs[i].NumComponents == 1); component_mask <<= 3; + } else { + component_mask <<= linked_xfb_info->Outputs[i].ComponentOffset; } buffer_mask |= 1 << buffer; |