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-rw-r--r--src/amd/common/ac_llvm_util.c48
-rw-r--r--src/amd/common/ac_llvm_util.h6
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c57
3 files changed, 55 insertions, 56 deletions
diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c
index bc309bd81c4..4c114585292 100644
--- a/src/amd/common/ac_llvm_util.c
+++ b/src/amd/common/ac_llvm_util.c
@@ -168,6 +168,9 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context)
ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
ctx->v16i8 = LLVMVectorType(ctx->i8, 16);
+ ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
+ "range", 5);
+
ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
"invariant.load", 14);
@@ -803,3 +806,48 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
ARRAY_SIZE(args), AC_FUNC_ATTR_READONLY);
}
}
+
+/**
+ * Set range metadata on an instruction. This can only be used on load and
+ * call instructions. If you know an instruction can only produce the values
+ * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
+ * \p lo is the minimum value inclusive.
+ * \p hi is the maximum value exclusive.
+ */
+static void set_range_metadata(struct ac_llvm_context *ctx,
+ LLVMValueRef value, unsigned lo, unsigned hi)
+{
+ LLVMValueRef range_md, md_args[2];
+ LLVMTypeRef type = LLVMTypeOf(value);
+ LLVMContextRef context = LLVMGetTypeContext(type);
+
+ md_args[0] = LLVMConstInt(type, lo, false);
+ md_args[1] = LLVMConstInt(type, hi, false);
+ range_md = LLVMMDNodeInContext(context, md_args, 2);
+ LLVMSetMetadata(value, ctx->range_md_kind, range_md);
+}
+
+LLVMValueRef
+ac_get_thread_id(struct ac_llvm_context *ctx)
+{
+ LLVMValueRef tid;
+
+ if (HAVE_LLVM < 0x0308) {
+ tid = ac_emit_llvm_intrinsic(ctx, "llvm.SI.tid",
+ ctx->i32,
+ NULL, 0, AC_FUNC_ATTR_READNONE);
+ } else {
+ LLVMValueRef tid_args[2];
+ tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
+ tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
+ tid_args[1] = ac_emit_llvm_intrinsic(ctx,
+ "llvm.amdgcn.mbcnt.lo", ctx->i32,
+ tid_args, 2, AC_FUNC_ATTR_READNONE);
+
+ tid = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
+ ctx->i32, tid_args,
+ 2, AC_FUNC_ATTR_READNONE);
+ }
+ set_range_metadata(ctx, tid, 0, 64);
+ return tid;
+}
diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h
index 7b08a269fcb..0244dc48b3d 100644
--- a/src/amd/common/ac_llvm_util.h
+++ b/src/amd/common/ac_llvm_util.h
@@ -57,7 +57,8 @@ struct ac_llvm_context {
LLVMTypeRef v4i32;
LLVMTypeRef v4f32;
LLVMTypeRef v16i8;
-
+
+ unsigned range_md_kind;
unsigned invariant_load_md_kind;
unsigned uniform_md_kind;
unsigned fpmath_md_kind;
@@ -176,6 +177,9 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
unsigned inst_offset,
unsigned glc,
unsigned slc);
+
+LLVMValueRef
+ac_get_thread_id(struct ac_llvm_context *ctx);
#ifdef __cplusplus
}
#endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index e4ed40e2581..e483fe4923a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1266,49 +1266,6 @@ static LLVMValueRef get_sample_id(struct si_shader_context *radeon_bld)
SI_PARAM_ANCILLARY, 8, 4);
}
-/**
- * Set range metadata on an instruction. This can only be used on load and
- * call instructions. If you know an instruction can only produce the values
- * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
- * \p lo is the minimum value inclusive.
- * \p hi is the maximum value exclusive.
- */
-static void set_range_metadata(struct si_shader_context *ctx,
- LLVMValueRef value, unsigned lo, unsigned hi)
-{
- LLVMValueRef range_md, md_args[2];
- LLVMTypeRef type = LLVMTypeOf(value);
- LLVMContextRef context = LLVMGetTypeContext(type);
-
- md_args[0] = LLVMConstInt(type, lo, false);
- md_args[1] = LLVMConstInt(type, hi, false);
- range_md = LLVMMDNodeInContext(context, md_args, 2);
- LLVMSetMetadata(value, ctx->range_md_kind, range_md);
-}
-
-static LLVMValueRef get_thread_id(struct si_shader_context *ctx)
-{
- struct gallivm_state *gallivm = &ctx->gallivm;
- LLVMValueRef tid;
-
- if (HAVE_LLVM < 0x0308) {
- tid = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid",
- ctx->i32, NULL, 0, LP_FUNC_ATTR_READNONE);
- } else {
- LLVMValueRef tid_args[2];
- tid_args[0] = lp_build_const_int32(gallivm, 0xffffffff);
- tid_args[1] = lp_build_const_int32(gallivm, 0);
- tid_args[1] = lp_build_intrinsic(gallivm->builder,
- "llvm.amdgcn.mbcnt.lo", ctx->i32,
- tid_args, 2, LP_FUNC_ATTR_READNONE);
-
- tid = lp_build_intrinsic(gallivm->builder,
- "llvm.amdgcn.mbcnt.hi", ctx->i32,
- tid_args, 2, LP_FUNC_ATTR_READNONE);
- }
- set_range_metadata(ctx, tid, 0, 64);
- return tid;
-}
/**
* Load a dword from a constant buffer.
@@ -2069,7 +2026,7 @@ static void si_llvm_emit_streamout(struct si_shader_context *ctx,
LLVMValueRef so_vtx_count =
unpack_param(ctx, ctx->param_streamout_config, 16, 7);
- LLVMValueRef tid = get_thread_id(ctx);
+ LLVMValueRef tid = ac_get_thread_id(&ctx->ac);
/* can_emit = tid < so_vtx_count; */
LLVMValueRef can_emit =
@@ -4806,7 +4763,7 @@ static void si_llvm_emit_ddxy(
int idx;
unsigned mask;
- thread_id = get_thread_id(ctx);
+ thread_id = ac_get_thread_id(&ctx->ac);
if (opcode == TGSI_OPCODE_DDX_FINE)
mask = TID_MASK_LEFT;
@@ -5237,14 +5194,6 @@ static void si_create_function(struct si_shader_context *ctx,
}
}
-static void create_meta_data(struct si_shader_context *ctx)
-{
- struct gallivm_state *gallivm = ctx->bld_base.base.gallivm;
-
- ctx->range_md_kind = LLVMGetMDKindIDInContext(gallivm->context,
- "range", 5);
-}
-
static void declare_streamout_params(struct si_shader_context *ctx,
struct pipe_stream_output_info *so,
LLVMTypeRef *params, LLVMTypeRef i32,
@@ -6216,7 +6165,6 @@ si_generate_gs_copy_shader(struct si_screen *sscreen,
builder = gallivm->builder;
- create_meta_data(&ctx);
create_function(&ctx);
preload_ring_buffers(&ctx);
@@ -6714,7 +6662,6 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
return false;
}
- create_meta_data(ctx);
create_function(ctx);
preload_ring_buffers(ctx);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 22:11:05 +0000