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-rw-r--r--src/gallium/drivers/r600/evergreen_state.c5
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h144
-rw-r--r--src/gallium/drivers/r600/r600_state.c5
-rw-r--r--src/gallium/drivers/r600/r600_state_common.c18
4 files changed, 79 insertions, 93 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 872fedfaf9d..d6214fe6686 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3148,6 +3148,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = FALSE;
unsigned spi_baryc_cntl, sid, tmp, idx = 0;
unsigned z_export = 0, stencil_export = 0;
+ unsigned sprite_coord_enable = rctx->rasterizer ? rctx->rasterizer->sprite_coord_enable : 0;
rstate->nregs = 0;
@@ -3183,7 +3184,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
}
if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
- (rctx->sprite_coord_enable & (1 << rshader->input[i].sid))) {
+ (sprite_coord_enable & (1 << rshader->input[i].sid))) {
tmp |= S_028644_PT_SPRITE_TEX(1);
}
@@ -3281,7 +3282,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
shader->db_shader_control = db_shader_control;
shader->ps_depth_export = z_export | stencil_export;
- shader->sprite_coord_enable = rctx->sprite_coord_enable;
+ shader->sprite_coord_enable = sprite_coord_enable;
if (rctx->rasterizer)
shader->flatshade = rctx->rasterizer->flatshade;
}
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index fc3591d1dd9..68e2f3b3095 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -370,44 +370,38 @@ struct r600_scissor_state
struct r600_context {
struct pipe_context context;
+ struct r600_screen *screen;
+ struct radeon_winsys *ws;
+ struct radeon_winsys_cs *cs;
struct blitter_context *blitter;
+ struct u_upload_mgr *uploader;
+ struct util_slab_mempool pool_transfers;
+
+ /* Hardware info. */
enum radeon_family family;
enum chip_class chip_class;
boolean has_vertex_cache;
boolean keep_tiling_flags;
+ unsigned default_ps_gprs, default_vs_gprs;
unsigned r6xx_num_clause_temp_gprs;
+ unsigned backend_mask;
+ unsigned max_db; /* for OQ */
+
+ /* Miscellaneous state objects. */
void *custom_dsa_flush;
void *custom_blend_resolve;
void *custom_blend_decompress;
+ /* With rasterizer discard, there doesn't have to be a pixel shader.
+ * In that case, we bind this one: */
+ void *dummy_pixel_shader;
+ /* These dummy CMASK and FMASK buffers are used to get around the R6xx hardware
+ * bug where valid CMASK and FMASK are required to be present to avoid
+ * a hardlock in certain operations but aren't actually used
+ * for anything useful. */
+ struct r600_resource *dummy_fmask;
+ struct r600_resource *dummy_cmask;
- struct r600_screen *screen;
- struct radeon_winsys *ws;
- struct r600_pipe_state *states[R600_PIPE_NSTATES];
- unsigned compute_cb_target_mask;
- unsigned db_shader_control;
- unsigned pa_sc_line_stipple;
- /* for saving when using blitter */
- struct r600_pipe_shader_selector *ps_shader;
- struct r600_pipe_shader_selector *vs_shader;
- struct r600_pipe_rasterizer *rasterizer;
- struct r600_pipe_state spi;
- struct pipe_query *current_render_cond;
- unsigned current_render_cond_mode;
- /* shader information */
- boolean two_side;
- boolean spi_dirty;
- unsigned sprite_coord_enable;
- boolean flatshade;
- bool alpha_to_one;
- bool multisample_enable;
-
- struct u_upload_mgr *uploader;
- struct util_slab_mempool pool_transfers;
-
- unsigned default_ps_gprs, default_vs_gprs;
-
- /******************************/
- /* States based on r600_atom. */
+ /* State binding slots are here. */
struct r600_atom *atoms[R600_NUM_ATOMS];
/* States for CS initialization. */
struct r600_command_buffer start_cs_cmd; /* invariant state mostly */
@@ -440,69 +434,63 @@ struct r600_context {
struct r600_vertexbuf_state vertex_buffer_state;
/** Vertex buffers for compute shaders */
struct r600_vertexbuf_state cs_vertex_buffer_state;
- /******************************/
- bool force_blend_disable;
+ /* Additional context states. */
+ unsigned flags;
+ unsigned compute_cb_target_mask;
+ unsigned db_shader_control;
+ struct r600_pipe_shader_selector *ps_shader;
+ struct r600_pipe_shader_selector *vs_shader;
+ struct r600_pipe_rasterizer *rasterizer;
+ bool alpha_to_one;
+ bool force_blend_disable;
+ boolean dual_src_blend;
- struct radeon_winsys_cs *cs;
+ /* Index buffer. */
+ struct pipe_index_buffer index_buffer;
- struct r600_range *range;
- unsigned nblocks;
- struct r600_block **blocks;
- struct list_head dirty;
- struct list_head enable_list;
- unsigned pm4_dirty_cdwords;
- unsigned ctx_pm4_ndwords;
+ /* Last draw state (-1 = unset). */
+ int last_primitive_type; /* Last primitive type used in draw_vbo. */
+ int last_start_instance;
+ /* Queries. */
/* The list of active queries. Only one query of each type can be active. */
- int num_occlusion_queries;
-
+ int num_occlusion_queries;
/* Manage queries in two separate groups:
* The timer ones and the others (streamout, occlusion).
*
* We do this because we should only suspend non-timer queries for u_blitter,
* and later if the non-timer queries are suspended, the context flush should
* only suspend and resume the timer queries. */
- struct list_head active_timer_queries;
- unsigned num_cs_dw_timer_queries_suspend;
- struct list_head active_nontimer_queries;
- unsigned num_cs_dw_nontimer_queries_suspend;
-
- bool timer_queries_suspended;
- bool nontimer_queries_suspended;
- bool streamout_suspended;
-
- unsigned num_cs_dw_streamout_end;
-
- unsigned backend_mask;
- unsigned max_db; /* for OQ */
- unsigned flags;
- boolean predicate_drawing;
-
- unsigned num_so_targets;
- struct r600_so_target *so_targets[PIPE_MAX_SO_BUFFERS];
- boolean streamout_start;
- unsigned streamout_append_bitmask;
-
- /* With rasterizer discard, there doesn't have to be a pixel shader.
- * In that case, we bind this one: */
- void *dummy_pixel_shader;
-
- boolean dual_src_blend;
-
- /* Index buffer. */
- struct pipe_index_buffer index_buffer;
+ struct list_head active_timer_queries;
+ unsigned num_cs_dw_timer_queries_suspend;
+ struct list_head active_nontimer_queries;
+ unsigned num_cs_dw_nontimer_queries_suspend;
+ /* Flags if queries have been suspended. */
+ bool timer_queries_suspended;
+ bool nontimer_queries_suspended;
+
+ /* Render condition. */
+ struct pipe_query *current_render_cond;
+ unsigned current_render_cond_mode;
+ boolean predicate_drawing;
- /* Dummy CMASK and FMASK buffers used to get around the R6xx hardware
- * bug where valid CMASK and FMASK are required to be present to avoid
- * a hardlock in certain operations but aren't actually used
- * for anything useful. */
- struct r600_resource *dummy_fmask;
- struct r600_resource *dummy_cmask;
+ /* Streamout state. */
+ unsigned num_cs_dw_streamout_end;
+ unsigned num_so_targets;
+ struct r600_so_target *so_targets[PIPE_MAX_SO_BUFFERS];
+ boolean streamout_start;
+ unsigned streamout_append_bitmask;
+ bool streamout_suspended;
- /* Last draw state (-1 = unset). */
- int last_primitive_type; /* Last primitive type used in draw_vbo. */
- int last_start_instance;
+ /* Deprecated state management. */
+ struct r600_pipe_state *states[R600_PIPE_NSTATES];
+ struct r600_range *range;
+ unsigned nblocks;
+ struct r600_block **blocks;
+ struct list_head dirty;
+ struct list_head enable_list;
+ unsigned pm4_dirty_cdwords;
};
static INLINE void r600_emit_command_buffer(struct radeon_winsys_cs *cs,
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 76af2a7f5dd..d7e04305f7d 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2613,6 +2613,7 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
unsigned tmp, sid, ufi = 0;
int need_linear = 0;
unsigned z_export = 0, stencil_export = 0;
+ unsigned sprite_coord_enable = rctx->rasterizer ? rctx->rasterizer->sprite_coord_enable : 0;
rstate->nregs = 0;
@@ -2633,7 +2634,7 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
tmp |= S_028644_FLAT_SHADE(1);
if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
- rctx->sprite_coord_enable & (1 << rshader->input[i].sid)) {
+ sprite_coord_enable & (1 << rshader->input[i].sid)) {
tmp |= S_028644_PT_SPRITE_TEX(1);
}
@@ -2717,7 +2718,7 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
shader->db_shader_control = db_shader_control;
shader->ps_depth_export = z_export | stencil_export;
- shader->sprite_coord_enable = rctx->sprite_coord_enable;
+ shader->sprite_coord_enable = sprite_coord_enable;
if (rctx->rasterizer)
shader->flatshade = rctx->rasterizer->flatshade;
}
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 3bc6d81fdba..2be3bf478c3 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -306,11 +306,6 @@ static void r600_bind_rs_state(struct pipe_context *ctx, void *state)
if (state == NULL)
return;
- rctx->sprite_coord_enable = rs->sprite_coord_enable;
- rctx->two_side = rs->two_side;
- rctx->pa_sc_line_stipple = rs->pa_sc_line_stipple;
- rctx->multisample_enable = rs->multisample_enable;
-
rctx->rasterizer = rs;
rctx->states[rs->rstate.id] = &rs->rstate;
@@ -691,9 +686,9 @@ static INLINE struct r600_shader_key r600_shader_selector_key(struct pipe_contex
memset(&key, 0, sizeof(key));
if (sel->type == PIPE_SHADER_FRAGMENT) {
- key.color_two_side = rctx->two_side;
+ key.color_two_side = rctx->rasterizer && rctx->rasterizer->two_side;
key.alpha_to_one = rctx->alpha_to_one &&
- rctx->multisample_enable &&
+ rctx->rasterizer && rctx->rasterizer->multisample_enable &&
!rctx->framebuffer.cb0_is_integer;
key.nr_cbufs = rctx->framebuffer.state.nr_cbufs;
/* Dual-source blending only makes sense with nr_cbufs == 1. */
@@ -1064,9 +1059,9 @@ static void r600_update_derived_state(struct r600_context *rctx)
r600_shader_select(ctx, rctx->ps_shader, &ps_dirty);
- if (rctx->ps_shader && ((rctx->sprite_coord_enable &&
- (rctx->ps_shader->current->sprite_coord_enable != rctx->sprite_coord_enable)) ||
- (rctx->rasterizer && rctx->rasterizer->flatshade != rctx->ps_shader->current->flatshade))) {
+ if (rctx->ps_shader && rctx->rasterizer &&
+ ((rctx->rasterizer->sprite_coord_enable != rctx->ps_shader->current->sprite_coord_enable) ||
+ (rctx->rasterizer->flatshade != rctx->ps_shader->current->flatshade))) {
if (rctx->chip_class >= EVERGREEN)
evergreen_pipe_shader_ps(ctx, rctx->ps_shader->current);
@@ -1225,7 +1220,8 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
ls_mask = 2;
r600_write_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE,
- S_028A0C_AUTO_RESET_CNTL(ls_mask) | rctx->pa_sc_line_stipple);
+ S_028A0C_AUTO_RESET_CNTL(ls_mask) |
+ (rctx->rasterizer ? rctx->rasterizer->pa_sc_line_stipple : 0));
r600_write_context_reg(cs, R_028A6C_VGT_GS_OUT_PRIM_TYPE,
r600_conv_prim_to_gs_out(info.mode));
r600_write_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE,
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 14:17:40 +0000