diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 12 |
3 files changed, 14 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 261dff68c9f..27f2123b7a0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -5228,7 +5228,7 @@ fs_visitor::allocate_registers() * SIMD8. There's probably actually some intermediate point where * SIMD16 with a couple of spills is still better. */ - if (dispatch_width == 16) { + if (dispatch_width == 16 && min_dispatch_width <= 8) { fail("Failure to register allocate. Reduce number of " "live scalar values to avoid this."); } else { diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 21c7813509b..d4acc8798be 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -409,6 +409,7 @@ public: bool spilled_any_registers; const unsigned dispatch_width; /**< 8 or 16 */ + unsigned min_dispatch_width; int shader_time_index; diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 88b18960949..dc61d096efc 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1021,6 +1021,18 @@ fs_visitor::init() unreachable("unhandled shader stage"); } + if (stage == MESA_SHADER_COMPUTE) { + const brw_cs_prog_data *cs_prog_data = + (const brw_cs_prog_data *) prog_data; + unsigned size = cs_prog_data->local_size[0] * + cs_prog_data->local_size[1] * + cs_prog_data->local_size[2]; + size = DIV_ROUND_UP(size, devinfo->max_cs_threads); + min_dispatch_width = size > 16 ? 32 : (size > 8 ? 16 : 8); + } else { + min_dispatch_width = 8; + } + this->prog_data = this->stage_prog_data; this->failed = false; |