diff options
Diffstat (limited to 'src')
4 files changed, 6 insertions, 26 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl b/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl index ddff39912cd..a6a76271565 100644 --- a/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl +++ b/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl @@ -57,7 +57,7 @@ my $FILE_TYPE = $ARGV[0]; open AMDIL, '<', 'AMDILInstructions.td'; -my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'CMOVLOG_f32', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32', 'MIN_f32'); +my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32', 'MIN_f32'); while (<AMDIL>) { if ($_ =~ /defm\s+([A-Z_]+)\s+:\s+([A-Za-z0-9]+)</) { diff --git a/src/gallium/drivers/radeon/AMDILInstructions.td b/src/gallium/drivers/radeon/AMDILInstructions.td index 3ee783696d8..5ea541c4d1f 100644 --- a/src/gallium/drivers/radeon/AMDILInstructions.td +++ b/src/gallium/drivers/radeon/AMDILInstructions.td @@ -22,9 +22,6 @@ defm AND : BinaryOpMCInt<IL_OP_AND, and>; defm CMOV : BinaryOpMC<IL_OP_CMOV, IL_cmov>; defm DIV_INF : BinaryOpMC<IL_OP_DIV_INF, IL_div_inf>; defm SMAX : BinaryOpMCInt<IL_OP_I_MAX, IL_smax>; -// This opcode has custom swizzle pattern encoded in Swizzle Encoder for 64bit -// instructions -defm CMOVLOG : TernaryOpMC<IL_OP_CMOV_LOGICAL, IL_cmov_logical>; // This opcode has a custom swizzle pattern in the Swizzle Encoder and // should never be selected in ISel. It should only be generated in the // I/O expansion code. These are different from the CMOVLOG instruction @@ -107,8 +104,6 @@ defm CARRY : BinaryIntrinsicInt<IL_OP_I_CARRY, int_AMDIL_carry_i32>; defm BORROW : BinaryIntrinsicInt<IL_OP_I_BORROW, int_AMDIL_borrow_i32>; defm IMIN : BinaryIntrinsicInt<IL_OP_I_MIN, int_AMDIL_min_i32>; defm IMAX : BinaryIntrinsicInt<IL_OP_I_MAX, int_AMDIL_max_i32>; -defm CMOV_LOG : TernaryIntrinsicInt<IL_OP_CMOV_LOGICAL, - int_AMDIL_cmov_logical>; defm IBIT_EXTRACT : TernaryIntrinsicInt<IL_OP_IBIT_EXTRACT, int_AMDIL_bit_extract_i32>; defm IMAD : TernaryIntrinsicInt<IL_OP_I_MAD, int_AMDIL_mad_i32>; diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index c3643b6f967..f7fe34b7326 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -421,7 +421,8 @@ def SETGE_UINT : R600_2OP < def CNDE_INT : R600_3OP < 0x1C, "CNDE_INT", - [] + [(set (i32 R600_Reg32:$dst), + (IL_cmov_logical R600_Reg32:$src0, R600_Reg32:$src2, R600_Reg32:$src1))] >; /* Texture instructions */ @@ -527,9 +528,9 @@ class MULADD_Common <bits<32> inst> : R600_3OP < class CNDE_Common <bits<32> inst> : R600_3OP < inst, "CNDE", - []> { - let AMDILOp = AMDILInst.CMOVLOG_f32; -} + [(set (f32 R600_Reg32:$dst), + (IL_cmov_logical R600_Reg32:$src0, R600_Reg32:$src2, R600_Reg32:$src1))] +>; class CNDGT_Common <bits<32> inst> : R600_3OP < inst, "CNDGT", diff --git a/src/gallium/drivers/radeon/R600LowerInstructions.cpp b/src/gallium/drivers/radeon/R600LowerInstructions.cpp index 2edae320c29..5a0f1d9cca9 100644 --- a/src/gallium/drivers/radeon/R600LowerInstructions.cpp +++ b/src/gallium/drivers/radeon/R600LowerInstructions.cpp @@ -114,22 +114,6 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF) .addReg(tmp2); break; } - case AMDIL::CMOVLOG_f32: - BuildMI(MBB, I, MBB.findDebugLoc(I), TM.getInstrInfo()->get(MI.getOpcode())) - .addOperand(MI.getOperand(0)) - .addOperand(MI.getOperand(1)) - .addOperand(MI.getOperand(3)) - .addOperand(MI.getOperand(2)); - break; - - case AMDIL::CMOVLOG_i32: - BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::CNDE_INT)) - .addOperand(MI.getOperand(0)) - .addOperand(MI.getOperand(1)) - .addOperand(MI.getOperand(3)) - .addOperand(MI.getOperand(2)); - break; - case AMDIL::CLAMP_f32: { MachineOperand lowOp = MI.getOperand(2); |