diff options
Diffstat (limited to 'src/panfrost/midgard/midgard_ra_pipeline.c')
| -rw-r--r-- | src/panfrost/midgard/midgard_ra_pipeline.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/panfrost/midgard/midgard_ra_pipeline.c b/src/panfrost/midgard/midgard_ra_pipeline.c index a5c1025ee27..feb457de0f9 100644 --- a/src/panfrost/midgard/midgard_ra_pipeline.c +++ b/src/panfrost/midgard/midgard_ra_pipeline.c @@ -46,13 +46,13 @@ mir_pipeline_ins( unsigned pipeline_count) { midgard_instruction *ins = bundle->instructions[i]; - unsigned dest = ins->ssa_args.dest; + unsigned dest = ins->dest; /* We could be pipelining a register, so we need to make sure that all * of the components read in this bundle are written in this bundle, * and that no components are written before this bundle */ - unsigned node = ins->ssa_args.dest; + unsigned node = ins->dest; unsigned read_mask = 0; /* Analyze the bundle for a read mask */ @@ -65,7 +65,7 @@ mir_pipeline_ins( /* Now analyze for a write mask */ for (unsigned i = 0; i < bundle->instruction_count; ++i) { midgard_instruction *q = bundle->instructions[i]; - if (q->ssa_args.dest != node) continue; + if (q->dest != node) continue; /* Remove the written mask from the read requirements */ read_mask &= ~q->mask; @@ -87,7 +87,7 @@ mir_pipeline_ins( midgard_instruction *end = bundle->instructions[ bundle->instruction_count - 1]; - if (mir_is_live_after(ctx, block, end, ins->ssa_args.dest)) + if (mir_is_live_after(ctx, block, end, ins->dest)) return false; /* We're only live in this bundle -- pipeline! */ |