4 files changed, 17 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 9929739094a..33471576446 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -95,7 +95,7 @@ gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg)
    struct intel_context *intel = &p->brw->intel;
    if (intel->gen == 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
       reg->file = BRW_GENERAL_REGISTER_FILE;
-      reg->nr += 112;
+      reg->nr += GEN7_MRF_HACK_START;
    }
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index d6233167e7a..5fdc055770a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -379,6 +379,7 @@ public:
       this->frag_depth = NULL;
       memset(this->outputs, 0, sizeof(this->outputs));
       this->first_non_payload_grf = 0;
+      this->max_grf = intel->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF;
 
       this->current_annotation = NULL;
       this->base_ir = NULL;
@@ -583,6 +584,7 @@ public:
    ir_variable *frag_depth;
    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
    int first_non_payload_grf;
+   int max_grf;
    int urb_setup[FRAG_ATTRIB_MAX];
    bool kill_emitted;
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index d4dd1240b70..0d1712e9d5a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -63,9 +63,9 @@ fs_visitor::assign_regs_trivial()
       assign_reg(hw_reg_mapping, &inst->src[1], reg_width);
    }
 
-   if (this->grf_used >= BRW_MAX_GRF) {
+   if (this->grf_used >= max_grf) {
       fail("Ran out of regs on trivial allocator (%d/%d)\n",
-	   this->grf_used, BRW_MAX_GRF);
+	   this->grf_used, max_grf);
    }
 
 }
@@ -156,7 +156,7 @@ fs_visitor::assign_regs()
    int reg_width = c->dispatch_width / 8;
    int hw_reg_mapping[this->virtual_grf_next];
    int first_assigned_grf = ALIGN(this->first_non_payload_grf, reg_width);
-   int base_reg_count = (BRW_MAX_GRF - first_assigned_grf) / reg_width;
+   int base_reg_count = (max_grf - first_assigned_grf) / reg_width;
    int class_sizes[base_reg_count];
    int class_count = 0;
 
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index aef56958c66..d23ad0d91a0 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -37,6 +37,17 @@
 /** Number of general purpose registers (VS, WM, etc) */
 #define BRW_MAX_GRF 128
 
+/**
+ * First GRF used for the MRF hack.
+ *
+ * On gen7, MRFs are no longer used, and contiguous GRFs are used instead.  We
+ * haven't converted our compiler to be aware of this, so it asks for MRFs and
+ * brw_eu_emit.c quietly converts them to be accesses of the top GRFs.  The
+ * register allocators have to be careful of this to avoid corrupting the "MRF"s
+ * with actual GRF allocations.
+ */
+#define GEN7_MRF_HACK_START 112.
+
 /** Number of message register file registers */
 #define BRW_MAX_MRF 16